Technical data
Schematics 61/72
netRAPID Chip Carrier | Design Guide
DOC111004DG04EN | Revision 4 | English | 2014-09 | Released | Public © Hilscher, 2013-2014
9 Schematics
9.1 Overview
This chapter contains the schematics of the Evaluation Boards. The schematics are an example
for the host system. The host CPU, which is a standard PC, is connected via a PC adapter card to
the host interface connector (X1).
Function NRPEB-CCS
NRPEB-DPS
NRPEB-RE2
Host interface
Host mode setting
Communication interface
USB diagnostic interface
SYNC interface and UART diagnostic
interface
Input 2x 4 bit (address switch)
Input 1x 4 bit (baud rate switch)
Output 1 bit GPIO
LED
Reset
S-Boot
Page 62 Page 64
Power supply Page 63 Page 65
Table 47: Function overview schematics










