Technical data

Evaluation Boards 47/72

netRAPID Chip Carrier | Design Guide

X1 Pin Signal Pin

(chip

carrier)

Description

41 DPM_A8 28 Dual-Port Memory Address 8

42 DPM_A7 27 Dual-Port Memory Address 7

43 DPM_A6 26 Dual-Port Memory Address 6

44 DPM_A5 25 Dual-Port Memory Address 5

45 DPM_A4 24 Dual-Port Memory Address 4

46 DPM_A3 23 Dual-Port Memory Address 3

47 DPM_A2 22 Dual-Port Memory Address 2

48 DPM_A1 21 Dual-Port Memory Address 1

49 DPM_A0 20 Dual-Port Memory Address 0

50 GND - Ground

51 DPM_D15 17 Dual-Port Memory Data 15

52 DPM_D14 16 Dual-Port Memory Data 14

53 DPM_D13 15 Dual-Port Memory Data 13

54 DPM_D12 14 Dual-Port Memory Data 12

DPM_D11 13 Dual-Port Memory Data 11 55

SPM_CLK

DPM_D10 12 Dual-Port Memory Data 10 56

SPM_CSn

DPM_D9 11 Dual-Port Memory Data 9 57

SPM_MOSI

DPM_D8 10 Dual-Port Memory Data 8 58

SPM_MISO

59 DPM_D7 9 Dual-Port Memory Data 7

60 DPM_D6 8 Dual-Port Memory Data 6

61 DPM_D5 7 Dual-Port Memory Data 5

62 DPM_D4 6 Dual-Port Memory Data 4

63 DPM_D3 5 Dual-Port Memory Data 3

64 DPM_D2 4 Dual-Port Memory Data 2

65 DPM_D1 3 Dual-Port Memory Data 1

66 DPM_D0 2 Dual-Port Memory Data 0

67 +3V3 - +3.3V Power Supply

68 GND - Ground

Table 33: Pin assignment X1

Position in Figure 16 on page 39 or Figure 17 on page 43.