Technical data

Evaluation Boards 44/72
netRAPID Chip Carrier | Design Guide
DOC111004DG04EN | Revision 4 | English | 2014-09 | Released | Public © Hilscher, 2013-2014
No. in
figure
Name Description Page
X2 Host interface measuring points 48
X11 JTAG interface, foil connector (for Hilscher development and production only) 52
-
- - -
X50 Ethernet interface (RJ45 socket) 40
-
- - -
S1 Address switch
Station address * 1
S2 Address switch
Station address * 10
44
Table 29: Positions on NRPEB-RE2
7.2.1 Ethernet interface (X50)
Ethernet on RJ45 Pin Assignment
Ethernet Pin Signal Description
1 TX+ Transmit data positive
2 TX– Transmit data negative
3 RX+ Receive data positive
4 Term 1
5 Term 1
Connected and terminated to PE via RC combination (Bob Smith
Termination)
6 RX– Receive data negative
7 Term 2
RJ45 socket,
female
8 Term 2
Connected and terminated to PE via RC combination (Bob Smith
Termination)
Table 30: Ethernet RJ45 pin assignment
7.2.2 Address switches for Ethernet (S1, S2)
Note: Address switches are for future use, as the Ethernet firmware does not read the
positions of the switches.