Technical data

Device type specific interfaces 38/72

netRAPID Chip Carrier | Design Guide

6.3.5 SYNC

The pins of the SYNC interface are shared with the pins for the UART interface.

Note: By default the SYNC interface is activated and UART is deactivated in the standard

firmware.

Pin Name Shared with

42 SYNC0 UART_RX

43 SYNC1 UART_TX

Table 20: Pin assignment to SYNC interface

The SYNC Signal has LVTTL level. A maximum load of 6 mA may not be exceeded.

Possible Destruction of the Device due to high current!

Make sure that outputs never drive against each other. Two outputs that drive against

each other cause a too high current and result in device damage.

This situation can happen for example if the host system has an output signal connected to

SYNC0 and a firmware is loaded that uses SYNC0 as output too.

It is also strongly recommended to keep the cable length for the SYNC signals below 50 mm and

to take EMC aspects into account. In general, both SYNC signal lines can be used as input or

output.

The following table shows the meaning of the SYNC signals for the real-time Ethernet protocols

currently offering SYNC signal support.

Protocol Signal SYNC0

Input/Output

Signal SYNC1

Input/Output

Since

Firmware

Version

Remarks

EtherCAT Slave SYNC 0

Output

SYNC 1

Output

- Configurable

PROFINET IO-

Device

- - - -

Sercos Slave CON_CLK

Output

DIV_CLK

Output

3.0.10.0 Configurable

Table 21: Meaning of the SYNC signals