Technical data

Host interface 17/72
netRAPID Chip Carrier | Design Guide
DOC111004DG04EN | Revision 4 | English | 2014-09 | Released | Public © Hilscher, 2013-2014
4 Host interface
4.1 Pin assignment
Pin Signal Specification Function Other shared
Signals
1 PE Protected Earth Ground
2 DPM_D0 I Dual-Port Memory Data 0
3 DPM_D1 I Dual-Port Memory Data 1
4 DPM_D2 I Dual-Port Memory Data 2
5 DPM_D3 I Dual-Port Memory Data 3
6 DPM_D4 I Dual-Port Memory Data 4
7 DPM_D5 I Dual-Port Memory Data 5
8 DPM_D6 I Dual-Port Memory Data 6
9 DPM_D7 I Dual-Port Memory Data 7
10 DPM_D8 SPM_MISO I O6 Dual-Port Memory Data 8 Serial-Host-Memory
SPI_MISO
11 DPM_D9 SPM_MOSI I I Dual-Port Memory Data 9 Serial-Host-Memory
SPI_MOSI
12 DPM_D10 SPM_CSn I I Dual-Port Memory Data 10 Serial-Host-Memory
SPI_CSn
13 DPM_D11 SPM_CLK I I Dual-Port Memory Data 11 Serial-Host-Memory
SPI_CLK
14 DPM_D12 I Dual-Port Memory Data 12
15 DPM_D13 I Dual-Port Memory Data 13
16 DPM_D14 I Dual-Port Memory Data 14
17 DPM_D15 I Dual-Port Memory Data 15
18 +3V3 +3.3V Power Supply
19 GND I Ground
20 DPM_A0 I Dual-Port Memory Address 0
21 DPM_A1 I Dual-Port Memory Address 1
22 DPM_A2 I Dual-Port Memory Address 2
23 DPM_A3 I Dual-Port Memory Address 3
24 DPM_A4 I Dual-Port Memory Address 4
25 DPM_A5 I Dual-Port Memory Address 5
26 DPM_A6 I Dual-Port Memory Address 6
27 DPM_A7 I Dual-Port Memory Address 7
28 DPM_A8 I Dual-Port Memory Address 8
29 DPM_A9 I Dual-Port Memory Address 9
30 DPM_A10 I Dual-Port Memory Address 10
31 DPM_A11 I Dual-Port Memory Address 11
32 DPM_A12 I Dual-Port Memory Address 12
33 DPM_A13 I Dual-Port Memory Address 13
34 DPM_CSn I50KU Dual-Port Memory Chip Select
35 DPM_BHEn I50KU Dual-Port Memory Bus High Enable
36 DPM_RDn I50KU Dual-Port Memory Read
37 DPM_WRn I50KU Dual-Port Memory Write
38 DPM_BUSYn I50KU Dual-Port Memory Busy