Specifications

Canoga Perkins

4.9 Programmable Buffered Interface / Model P53

Signal Full Name Direction

TxD Transmit Data To Modem

RxD Receive Data From Modem

SCR Serial Clock Receive From Modem

SCT Serial Clock Transmit From Modem

SCTE External Clock Transmit To Modem

Table 4-O.

BNC Supported

Signals

The Model P53 Interface Module complies with EIA Standard RS-530 while all

clock, data and control signals follow the RS-422 standard. The basic configura-

tion of the P53 interface is a DCE device (w/Fem DB-25) and two connector

adapters are provided with the interface: the DCE / DTE adapter which converts

the interface to the DTE form (w/Male DB-25) and the "Legacy" adapter which

converts the interface to the original Model P2 interface.

This interface implements a set of circuits (resources) which can be interconnected

in various ways to satisfy a host of differing applications. These resources are:

• a 16-bit FIFO (first-in, first-out) buffer

• an inverter

• a switchable delay line

The FIFO can be utilized to buffer either the received or the transmitted data (not

both). The Delay Line, in conjunction with a four-position DIP switch, provides an

option for fine tuning the relationship between clock and data timing. Table 4-P

defines the delay lines versus switch settings for the Model P53 Interface.