Product Info

LTE Module Series
EC21 Hardware Design
EC21_Hardware_Design
9
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Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM
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17
FIGURE 2: PIN ASSIGNMENT (TOP VIEW).................................................................................错误！未定义书签。
FIGURE 3: SLEEP MODE APPLICATION VIA UART
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29
FIGURE 4: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP
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30
FIGURE 5: SLEEP MODE APPLICATION WITH RI
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31
FIGURE 6: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION
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32
FIGURE 7: POWER SUPPLY LIMITS DURING BURST TRANSMISSION
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33
FIGURE 8: STAR STRUCTURE OF THE POWER SUPPLY
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34
FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY
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35
FIGURE 10: TURN ON THE MODULE BY USING DRIVING CIRCUIT
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36
FIGURE 11: TURN ON THE MODULE BY USING BUTTON
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36
FIGURE 12: TIMING OF TURNING ON MODULE
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37
FIGURE 13: TIMING OF TURNING OFF MODULE
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38
FIGURE 14: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT
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39
FIGURE 15: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON
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39
FIGURE 16: TIMING OF RESETTING MODULE
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40
FIGURE 17: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
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41
FIGURE 18: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR
..
41
FIGURE 19: REFERENCE CIRCUIT OF USB APPLICATION
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43
FIGURE 20: REFERENCE CIRCUIT WITH TRANSLATOR CHIP
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45
FIGURE 21: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT
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46
FIGURE 22: PRIMARY MODE TIMING
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47
FIGURE 23: AUXILIARY MODE TIMING
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47
FIGURE 24: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC
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48
FIGURE 25: REFERENCE CIRCUIT OF SD CARD
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50
FIGURE 26: REFERENCE CIRCUIT OF THE NETWORK INDICATOR
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52
FIGURE 27: REFERENCE CIRCUITS OF STATUS
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53
FIGURE 28: SIMPLIFIED BLOCK DIAGRAM FOR ETHERNET APPLICATION
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55
FIGURE 29: REFERENCE CIRCUIT OF SGMII INTERFACE WITH PHY AR8033 APPLICATION
...................
56
FIGURE 30: REFERENCE CIRCUIT OF WIRELESS CONNECTIVITY INTERFACES WITH FC20 MODULE 错
误！未定义书签。
FIGURE 31: REFERENCE CIRCUIT OF USB_BOOT INTERFACE
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57
FIGURE 32: REFERENCE CIRCUIT OF RF ANTENNA INTERFACE
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62
FIGURE 33: MICROSTRIP LINE DESIGN ON A 2-LAYER PCB
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62
FIGURE 34: COPLANAR WAVEGUIDE LINE DESIGN ON A 2-LAYER PCB
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63
FIGURE 35: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE
GROUND)
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63
FIGURE 36: COPLANAR WAVEGUIDE LINE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE
GROUND)
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63
FIGURE 37: REFERENCE CIRCUIT OF GNSS ANTENNA
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65