Specifications

Section 4. Sensor Support
4-33
levels. Software switch debouncing of switch closure is incorporated in the
switch-closure mode for digital I/O parts C1 – C8.
Minimum and maximum input voltages on digital I/O
channels C1 – C8 is –8.0 V and +16 V, respectively. If
pulse inputs < -8.0 V or > +16 V are to be measured by C1
– C8, then external signal conditioning should be
employed. Contact a Campbell Scientific applications
engineer if assistance is needed. Under no circumstances
should voltages greater than ±50 V be measured.
4.6 Period Averaging Measurements
The CR1000 can measure the period of a signal on any single-ended analog
input channel (SE 1 -16). The specified number of cycles are timed with a
resolution of 92 ns, making the resolution of the period measurement 92 ns
divided by the number of cycles chosen.
Low-level signals are amplified prior to a voltage comparator. The internal
voltage comparator is referenced to the user-entered threshold. The threshold
parameter allows a user to reference the internal voltage comparator to voltages
other than 0 V. For example, a threshold of 2500 mV allows a 0 to 5 V digital
signal to be sensed by the internal comparator without the need of any
additional input conditioning circuitry. The threshold allows direct connection
of standard digital signals, but is not recommended for small amplitude sensor
signals. For sensor amplitudes less than 20 mV peak-to-peak, a DC blocking
capacitor is recommended to center the signal at CR1000 ground (threshold =
0) because of offset voltage drift along with limited accuracy (± 10 mV) and
resolution (1.2 mV) of a threshold other than 0. FIGURE 4.6-1 shows an
exam
ple circuit.
c
V
o s
S
ensor
w
ith
D
C
o
ffset
Silicon diodes
such as 1N4001
To single - ende
d
input
1µF
D1
D2
R
10k
FIGURE 4.6-1. Input conditioning circuit for low-level and high level period averaging.
The minimum pulse width requirements increase (maximum frequency
decreases) with increasing gain. Signals larger than the specified maximum for
a range will saturate the gain stages and prevent operation up to the maximum
specified frequency. As shown in FIGURE 4.6-1, back-to-back diodes are
reco
mmended to limit large amplitude signals to within the input signal ranges.
CAUTION