Specifications

Section 4. Sensor Support
4-31
FIGURE 4.5-2. Pulse Input Types
Maximum input voltage on pulse channels P1 and P2 is
±20 V. If pulse inputs of higher than ±20 V need to be
measured, third party external signal conditioners should
be employed. Contact a Campbell Scientific applications
engineer if assistance is needed. Under no circumstances
should voltages greater than ±50 V be measured.
4.5.1.1 High-frequency Pulse
Internal hardware routes high-frequency pulse to an inverting CMOS input
buffer with input hysteresis. The CMOS input buffer is guaranteed to be an
output zero level with its input ≥ 2.2 V, and guaranteed to be an output one
with its input ≤ 0.9 V. An RC input filter with approximately a 1 μs time
constant precedes the inverting CMOS input buffer, resulting in an amplitude
reduction of high frequency signals between the P1 and P2 terminal blocks and
the inverting CMOS input buffer as illustrated in FIGURE 4.5-3. For a 0 to 5
V s
quare wave applied to P1 and P2, the maximum frequency that can be
counted in high-frequency mode is approximately 250 kHz.
02
.
10
6
4
.
10
6
6
.
10
6
8
.
10
6
1
.
10
5
0
1
2
3
4
5
5.1
0.1−
Before
After
110
5−
×
0 time
FIGURE 4.5-3. Amplitude reduction of pulse-count waveform
before and after 1
μ s time constant filter.
CAUTION