User Guide

Table Of Contents
PowerSupply
Pins defined as having the direction Pwr are automatically wired up.
This is true, even if the associated power gate has not explicitly been
fetched into the schematic. The name of the Pwr pin determines the
name of the voltage line. This is already fixed by the definition of the
symbolsinthelibrary.
If nets are connected to a device’s Pwr pins, then these pins are not
automaticallywired.Theyarejoinedinsteadtotheconnectednet.
For every Pwr-pin there must be at least one pin with the same name but
the direction Sup (a supply pin). There must be one on every sheet.
These Sup pins are fetched into the schematic in the form of power sup
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ply symbols, and are defined as devices in a library (see supply.lbr).
These devices do not have a package, since they do not represent com
-
ponents. They are used to represent the supply voltages in the schematic
diagram, as is required by the electrical rule check (ERC) for the pur
-
posesofitslogicalchecks.
Various supply voltages, such as 0 V or GND, which are to have the
same potential (GND, let’s say), can be connected by adding the corre
-
sponding supply symbols and connecting them with a net. This net is
thengiventhenameofthatpotential(e.g.GND).
Supplysymbols
If a supply pin (with pin direction Sup) is placed on a net (with ADD,
MOVE) then this net segment will receive the name of the supply pin.
The user will be informed if the net name changes as soon as a supply
pin is connected. If the last supply pin on a net is deleted, it is given a
new,automaticallygeneratedname.
CheckandCorrectSchematic
A schematic diagram must be checked with the aid of the Electrical Rule
Check (ERC), when the design of the schematic diagram has been com
-
pleted, if not before. The ERC writes all its warnings and error messages
intoatextfile(*.erc),anddisplaysthisfileinathetexteditorwindow.
Please check all the messages and make corrections in the schematic, if
necessary.RunERCagaintocheckyourefforts.
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FromSchematictoFinishedBoard