User Guide

Table Of Contents
used as a placeholder at a suitable location in the device name to repre
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sent the different technologies. Enter, therefore, the name 54*1032A,
andconfirmthequestion Createnewdevice‘54*1032A?with Ye s.
TheDeviceEditorwindowopens.
SelectSymbols
First use ADD to fetch the symbols that belong to this device. A win
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dow opens in which all the symbols available in the current library are
displayed. Double-click on the 2-input_positive_or symbol and place it
fourtimes.
Click again on the ADD icon, and select the ‘VCC-GND’ symbol from
thelist.Placethistooontothedrawingarea.
NamingtheGates
A symbol that is used in a device is known as a gate. They are automati
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cally given generated names (G$1, G$2 etc.). This name is not usually
shownontheschematicdiagram.
It is nevertheless helpful to assign individual gate names when compo
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nents are composed of a number of gates. To distinguish the individual
OR gates, you use the NAME command to alter the gate names. Assign
thenames A, B, C and D, andnamethepowersupplygate P.
SpecifytheAddlevelsandSwaplevels
The addlevel can be used to specify how the gates are placed in the sche
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matic diagram by the ADD command. You can see the current addlevel
foreachgatewrittenaboveleftinlayer93, Pins.
Assign the addlevel Next for gates A to D, and the addlevel Request to
the power supply gate. Do this by clicking on the CHANGE icon, se
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lecting the Addlevel entry, and then selecting the desired value for a gate.
Thenclickonthegatethatyouwanttochange.
This means that as soon as the first OR gate has been placed on the
schematic diagram, the next one is attached to the mouse cursor. All 4
gates can be placed one after another. The power gate does not auto
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matically appear. You can, however, fetch it into the schematic diagram
ifnecessary,bymakinguseoftheINVOKEcommand.
The parameter ADDLEVEL is described in full detail in the section en
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titled MoreAbouttheAddlevelParameter onpage 195.
The swaplevel determines whether a device’s gates can be swapped
within the schematic diagram. The value that is currently set is like the
addlevel displayed above left in layer 93, Pins, for each gate. The
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ComponentDesignExplainedthroughExamples