Manual

220 Series Commercial Grade CF Product Manual v2.0Cactus Technologies

SRESET Soft Reset—Setting this bit to one (1), waiting the minimum reset width time

and returning to zero (0) places the CompactFlash Memory Card in the Reset

state. Setting this bit to one (1) is equivalent to assertion of the +RESET signal

except that the SRESET bit is not cleared. Returning this bit to zero (0) leaves

the CompactFlash Memory Card in the same un-congured, Reset state as

following power-up and hardware reset. This bit is set to zero (0) by power-up

and hardware reset. Using the PC Card Soft Reset is considered a hard Reset by

the ATA Commands. Contrast with Soft Reset in the Device Control Register.

LevlREQ This bit is set to one (1) when Level Mode Interrupt is selected, and zero (0)

when Pulse Mode is selected. Set to zero (0) by Reset.

Conf5—Conf0 Conguration Index. Set to zero (0) by reset. It’s used to select operation mode

of the CompactFlash Memory Card as shown below.

NOTE: Conf5 and Conf4 are reserved and must be written as zero (0).

Changed Indicates that one or both of the Pin Replacement register CRdy, or CWProt bits

are set to one (1). When the Changed bit is set, -STSCHG Pin 46 is held low if the

SigChg bit is a One (1) and the CompactFlash Memory Card is congured for the

I/O interface.

SigChg This bit is set and reset by the host to enable and disable a state-change “signal”

from the Status Register, the Changed bit control pin 46 the Changed Status

signal. If no state change signal is desired, this bit should be set to zero (0) and

pin 46 (-STSCHG) signal will be held high while the CompactFlash Memory Card is

congured for I/O.

Conf5 Conf4 Conf3 Conf2 Conf1 Conf0 Disk Card Mode

0 0 0 0 0 0

Memory Mapped

0 0 0 0 0 1

I/O Mapped, Any 16 byte system

decoded boundary

0 0 0 0 1 0

I/O Mapped, 1F0-1F7/3F6-3F7

0 0 0 0 1 1

I/O Mapped, 170-177/376-377

3.4.3. Card Conguration and Status Register

(Address 202h in Attribute Memory)

The Card Conguration and Status Register contain information about the Card’s condition.

Operation

D7 D6 D5 D4 D3 D2 D1 D0

Read

Changed SigChg IOis8 0 0 PwrDwn Int 0

Write

0 SigChg IOis8 0 0 PwrDwn 0 0

Table 3-11. Card Congurations

Table 3-12. Card Conguration and Status Register Organization