Specifications

7. Application Instructions
© DELTA ELECTRONICS, INC. ALL RIGHTS RESERVED
7-28
D
53 HSCS
S1 S2 D
32-bit High speed counter
comparison set
Bit device Word device
Device
Operand
X Y M S K H KnX KnY KnM KnS T C D
S1
ϨϨϨϨϨϨϨϨϨ
S2
C235~C254
D
ϨϨϨ
D
54 HSCR
S1 S2 D
32-bit High speed counter
comparison reset
Bit device Word device
Device
Operand
X Y M S K H KnX KnY KnM KnS T C D
S1
ϨϨϨϨϨϨϨϨϨ
S2
C235~C254
D
ϨϨϨ
 There is no 16-bit command for API 53 and API 54. (only 32-bit
command, DHSCS and DHSCR are available)
 Users must use X0~X3 for High-Speed Counter inputs.
 The goal of counting is to do a special action when the count
S
2
reaches a preset value
S
1
. A preset is a number you derive and
store so the counter will constantly compare and use for other
functions.
 The counter compares the current count with up to 4 preset values,
which you define by using instruction DHSCS and DHSCR. If
D
is
device Y, then only devices Y00~Y17 are effective.
 All high speed counters have its specified high speed counter terminals.
Every input rapid pulse by high speed counting use an interrupt
process to input signal counting value.
 Program Example
X10
DCNT C251
M0
DHSCR K100 C251
SET Y0
Y10
C251
X10
X0
X1
X3
X2
C249
Counting input enable
Counting input disable
X2 (Reset input) ON,
clear C249 to
0
 When M0 = On and the present value of the high speed timer C249
changes from (99 to 100) or (101 to 100), then Y10 will be ON.
 When the present value of high-speed timer C249 changes from (999
to 1000) or (1001 to 1000). C249 will be activated, and Y17 will be
ON, but there will be a delay due to the program scan time.
 Program Example
Ϩʳ AB phase high speed counter can be changed to inactivated by using
D1022 double frequency setting mode when PLC goes from STOP to
RUN.