User`s manual

CT-XBT0x Mini-ITX Motherboard
7
5.1.4 Serial Port Console Redirection............................................................ 37
5.1.5 CPU Configuration................................................................................ 38
5.1.6 SATA Configuration .............................................................................. 39
5.1.7 Miscellaneous Configuration................................................................. 40
5.1.8 LPSS & SCC Configuration .................................................................. 41
5.1.9 CSM Configuration................................................................................ 42
5.1.10 SDIO Configuration............................................................................... 43
5.1.11 USB Configuration ................................................................................ 44
5.1.12 Security Configuration........................................................................... 45
5.2 Chipset ...............................................................................................46
5.2.1 Northbridge Configuration..................................................................... 47
5.2.2 Southbridge Configuration.................................................................... 50
5.3 Security...............................................................................................53
5.3.1 Secure Boot Menu ................................................................................ 54
5.4 Boot ....................................................................................................55
5.5 Save and Exit .....................................................................................56
6. Address Map .........................................................................................57
6.1 I/O Port Address Map.........................................................................57
6.2 Interrupt Controller (IRQ) Map............................................................58
6.3 Memory Map.......................................................................................65