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VSKDS403/100 www.vishay.
VSKDS403/100 www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS VALUES Maximum average forward current IF(AV) 50 % duty cycle at TC = 111 °C, rectangular waveform 200 Maximum peak one cycle non-repetitive surge current IFSM Non-repetitive avalanche energy EAS TJ = 25 °C, IAS = 5.5 A, L = 1 mH 15 mJ IAR Current decaying linearly to zero in 1 μs Frequency limited by TJ maximum VA = 1.
VSKDS403/100 Vishay Semiconductors 1000 1000 IR - Reverse Current (mA) IF - Instantaneous Forward Current (A) www.vishay.com 100 TJ = 175 °C 10 TJ = 125 °C TJ = 25 °C 1 0.0 TJ = 175 °C 150 °C 100 125 °C 10 100 °C 1 75 °C 50 °C 0.1 25 °C 0.01 0.001 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 20 40 60 80 100 VFM - Forward Voltage Drop (V) VR - Reverse Voltage (V) Fig. 1 - Maximum Forward Voltage Drop Characteristics Fig. 2 - Typical Values of Reverse Current vs.
VSKDS403/100 Vishay Semiconductors 300 200 Square wave (D = 0.50) 80 % rated VR applied 250 Average Power Loss (W) Allowable Case Temperature (°C) www.vishay.com 150 DC 100 50 D = 0.75 D = 0.50 D = 0.33 D = 0.25 D = 0.20 200 150 RMS limit 100 DC 50 see note (1) 0 0 0 100 200 300 400 0 500 50 100 150 200 250 300 IF(AV) - Average Forward Current (A) Fig. 5 - Maximum Allowable Case Temperature vs. Average Forward Current Fig.
VSKDS403/100 www.vishay.com Vishay Semiconductors ORDERING INFORMATION TABLE Device code VS KD S 40 3 1 2 3 4 5 / 1 - Vishay Semiconductors product 2 - Circuit configuration: 100 6 KD = ADD-A-PAK - 2 diodes in series 3 - S = Schottky diode 4 - Average rating (x 10) 5 - Product silicon identification 6 - Voltage rating (100 = 100 V) CIRCUIT CONFIGURATION (1) ~ (2) + (3) - LINKS TO RELATED DOCUMENTS Dimensions Revision: 09-Jan-12 www.vishay.
Outline Dimensions Vishay Semiconductors ADD-A-PAK Generation VII - Diode DIMENSIONS in millimeters (inches) 29 ± 0.5 (1 ± 0.020) 30 ± 0.5 (1.18 ± 0.020) 35 REF. 18 (0.7) REF. 24 ± 0.5 (1 ± 0.020) 6.7 ± 0.3 (0.26 ± 0.012) Viti M5 x 0.8 Screws M5 x 0.8 Document Number: 95369 Revision: 11-Nov-08 7 6 4 5 3 2 1 6.3 ± 0.2 (0.248 ± 0.008) 22.6 ± 0.2 (0.89 ± 0.008) 80 ± 0.3 (3.15 ± 0.012) 15 ± 0.5 (0.59 ± 0.020) 20 ± 0.5 (0.79 ± 0.020) 20 ± 0.5 (0.79 ± 0.020) 92 ± 0.75 (3.6 ± 0.
VISHAY SEMICONDUCTORS Modules Application Note Mounting Instructions for ADD-A-PAK Generation VII Generation VII ADD-A-PAK (AAP) power modules combine the excellent thermal performance enabled by a direct bonded copper (Al2O3) substrate, superior mechanical ruggedness, and an environmentally friendly manufacturing process that eliminates the use of hard molds, thus reducing direct stresses on the leads. To prevent axial pull-out, the electrical terminals are co-molded to the module housing.
Application Note Vishay Semiconductors Mounting Instructions for ADD-A-PAK Generation VII Next, make a uniform coating on the heatsink mounting surfaces and module substrate with a good quality thermal compound. Screen printing of the compound is recommended, as well as direct application through a roller or spatula. The datasheet values for thermal resistance assume a uniform layer of thermal compound with a maximum thickness of 0.08 mm. The thermal conductivity of the compound should be no less than 0.
Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product.
