Owner's manual

Document Number: 93756 For technical questions, contact: [e-mail]
www.vishay.com
Revision: 03-Jun-08 3
T..RIA Series
Medium Power Phase Control Thyristors
(Power Modules), 50 A/70 A/90 A
Vishay High Power Products
Note
(1)
Available with dV/dt = 1000 V/µs, to complete code add S90 i.e. T90RIA80S90
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum peak reverse and
off-state leakage current
I
RRM
,
I
DRM
T
J
= T
J
maximum 15 mA
RMS isolation voltage V
ISOL
50 Hz, circuit to base, all terminals shorted, T
J
= 25 °C, t = 1 s 3500 V
Critical rate of rise of
off-state voltage
dV/dt T
J
= T
J
maximum, linear to 80 % rated V
DRM
(1)
500 V/µs
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS T50RIA T70RIA T90RIA UNITS
Maximum peak gate power P
GM
T
J
= T
J
maximum, t
p
≤ 5 ms 10 12 12
W
Maximum average
gate power
P
G(AV)
T
J
= T
J
maximum, f = 50 Hz 2.5 3 3
Maximum peak gate current I
GM
T
J
= T
J
maximum, t
p
≤ 5 ms
2.5 3 3 A
Maximum peak
negative gate voltage
-V
GT
10 10 10 V
Maximum required
DC gate voltage to trigger
V
GT
T
J
= - 40 °C
Anode supply = 6 V,
resistive load; Ra = 1 Ω
4.0 4.0 4.0
VT
J
= 25 °C 2.5 2.5 2.5
T
J
= T
J
maximum 1.5 1.5 1.5
Maximum required
DC gate current to trigger
I
GT
T
J
= - 40 °C 250 270 270
mAT
J
= 25 °C 100 120 120
T
J
= T
J
maximum 50 60 60
Maximum gate voltage
that will not trigger
V
GD
T
J
= T
J
maximum, rated V
DRM
applied
0.2 0.2 0.2 V
Maximum gate current
that will not trigger
I
GD
5.0 6.0 6.0 mA
Maximum rate of rise of
turned-on current
dI/dt
V
D
= 0.67 rated V
DRM
, I
TM
= 2 x rated dI/dt
I
g
= 400 mA for T50RIA and I
g
= 500 mA for T70RIA/T90RIA;
t
r
< 0.5 µs, t
p
≥ 6 µs
For repetitive value use 40 % non-repetitive
Per JEDEC STD. RS397, 5.2.2.6
200 200 200
A/µs
180 180 180
160 160 160
150 150 150