Instructions

34Hardware
© 2013 Conrad Electronic
Ports
Max. admissible current from digital ports
± 20 mA
Admissible current total on digital ports
200mA
Admissible input voltage on port pins (digital and
A/D)
–0.5V ... 5.5V
Internal pull-up resistors (disconnectable)
20 - 50 kOhm
2.1.5.1 CPU
AT90CAN Overview
The Micro Controller AT90CAN originates from the AVR family by ATMEL. It is a low-power Micro
Controller with Advanced RISC Architecture. In the following see a short summary of its hardware re-
sources:
Advanced RISC Architecture
133 Powerful Instructions – Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers + Peripheral Control Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
On-chip 2-cycle Multiplier
Non volatile Program and Data Memories
32K/64K/128K Bytes of In-System Reprogrammable Flash (AT90CAN32/64/128)
• Endurance: 10,000 Write/Erase Cycles
Optional Boot Code Section with Independent Lock Bits
• Selectable Boot Size: 1K Bytes, 2K Bytes, 4K Bytes or 8K Bytes
• In-System Programming by On-Chip Boot Program (CAN, UART, ...)
• True Read-While-Write Operation
1K/2K/4K Bytes EEPROM (Endurance: 100,000 Write/Erase Cycles) (AT90CAN32/64/128)
2K/4K/4K Bytes Internal SRAM (AT90CAN32/64/128)
Up to 64K Bytes Optional External Memory Space
Programming Lock for Software Security
JTAG (IEEE std. 1149.1 Compliant) Interface
Boundary-scan Capabilities According to the JTAG Standard
Programming Flash (Hardware ISP), EEPROM, Lock & Fuse Bits
Extensive On-chip Debug Support
CAN Controller 2.0A & 2.0B - ISO 16845 Certified (1)
15 Full Message Objects with Separate Identifier Tags and Masks
Transmit, Receive, Automatic Reply and Frame Buffer Receive Modes
1Mbits/s Maximum Transfer Rate at 8 MHz
Time stamping, TTC & Listening Mode (Spying or Autobaud)
Peripheral Features
Programmable Watchdog Timer with On-chip Oscillator
8-bit Synchronous Timer/Counter-0