User`s guide

C-3
Error Messages and Recovery Information
SAL–A POST Codes
Note:
In this document, Post Codes are presented in chronological order.
POST Codes
Meaning
0x8FED Initialize base memory
0x8FEC Levelization OK
0x8FEE Enable SNC ports. Program SNC static registers
0x8FEA System BSP election (case with SPS)
0x8FD7 (1) Looks for PEloader (case without SPS)
0x8FD7 (2) Looks for PEloader (case with SPS)
0x8FCE (1) Start programming SIOH (case without SPS)
0x8FCE (2) Start programming SPS, SIOH (case with SPS)
0x8FAE (1) End programming SIOH (case without SPS)
0x8FAE (2) End programming SPS, SIOH (case with SPS)
0x8FAD Execute Autoscan
0x8FAB Initialize ICH2
0x8FAA Initialize SIO. Program refresh for fixed delay
Table 40. SAL–A POST codes (before release B600)
POST Codes
Meaning
0x8FFF Node BSP has been selected
0x8FFD CVDR/CVCR Programming: a work in progress
0x8FFB Reset system after CVDR/CVCR programming
0x8FF9 Reset failed after CVDR/CVCR programming
0x8FF7 SNC minimum programming stepping independant
0x8FF5 SNC minimum programming stepping dependant
0x8FF3 FSS (SPS) only: enable SNC scalability ports SP0, SP1
0x8FEF Enter into memory levelization
0x8FE0 Exit from memory levelization
0x8FDF Initialize temporary backing store and memory stack
0x8FDE Load IVT into memory, Programm IVA
0x8FDD BSPS only: enable SNC scalability ports SP0, SP1
0x8FDC SNC Initialization complete
0x8FDB Search North Firmware Standard Fit for mandatory modules
0x8FDA Search North Firmware Extented Fit for mandatory modules