Datasheet

14
Figure 24. ABSVAL with 1 phase.Figure 23. ABSVAL with 2 phases, wired-ORed
together.
Figure 22. ABSVAL with 3 phases, wired-ORed
together.
ABSVAL – V
0
0
TIME – SECONDS
4.0
0.01 0.02 0.03 0.04
2.0
3.0
1.0
ABSVAL – V
0
0
TIME – SECONDS
4.0
0.01 0.02 0.03 0.04
2.0
3.0
1.0
ABSVAL – V
0
0
TIME – SECONDS
4.0
0.01 0.02 0.03 0.04
2.0
3.0
1.0
Applications Information
Production Description
Figure 21 shows the internal
block diagram of the HCPL-788J.
The analog input (V
IN
) is con-
verted to a digital signal using a
sigma-delta (∑-∆) analog to
digital (A/D) converter. This A/D
samples the input 6 million
times per second and generates a
high speed 1-bit output
representing the input very
accurately. This 1 bit data
stream is transmitted via a light
emitting diode (LED) over the
optical barrier after encoding.
The detector converts the optical
signal back to a bit stream. This
bit stream is decoded and drives
a 1 bit digital to analog (D/A)
converter. Finally a low pass
filter and output buffer drive the
output signal (V
OUT
) which
linearly represents the analog
input. The output signal full-
scale range is determined by the
external reference voltage (V
REF
).
By sharing this reference voltage
(which can be the supply
voltage), the full-scale range of
the HCPL-788J can precisely
match the full-scale range of
an external A/D converter.
In addition, the HCPL-788J
compares the analog input (V
IN
)
to both the negative and positive
full-scale values. If the input
exceeds the full-scale range,
the short-circuit fault output
(FAULT) is activated quickly.
This feature operates indepen-
dently of the ∑-∆ A/D converter
in order to provide the high-
speed response (typically 3 µs)
needed to protect power tran-
sistors. The FAULT output is
wire OR-able so that a short
circuit on any one motor phase
can be detected using only one
signal.
One other output is provided —
the rectified output (ABSVAL).
This output is also wire OR-able.
The motor phase having the
highest instantaneous rectified
output pulls the common output
high. When three sinusoidal
motor phases are combined, the
rectified output (ABSVAL) is
essentially a DC signal
representing the rms motor
current. This single DC signal
and a threshold comparator can
indicate motor overload
conditions before damage to the
motor or drive occur. Figure 22
shows the ABSVAL output when
3 HCPL-788Js are used to
monitor a sinusoidal 60 Hz
current. Figures 23 and 24 show
the ABSVAL output when only 2
or 1 of the 3 phases are
monitored, respectively.
The HCPL-788J’s other main
function is to provide galvanic
isolation between the analog
input and the analog output.
An internal voltage reference
determines the full-scale analog
input range of the modulator
(approximately ±256 mV);
an input range of ±200 mV is
recommended to achieve
optimal performance.