Datasheet

8
Electrical Specications
Test conditions that are not specied can be anywhere within the recommended operating range.
All typical specications are at T
A
= +25°C, V
DD1
= V
DD2
= +5 V.
Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note
DC Specications
Logic Low Input I
DD1L
6.0 10.0 mA V
I
= 0 V 2
Supply Current
Logic High Input I
DD1H
1.5 3.0 mA V
I
= V
DD1
Supply Current
Output Supply Current I
DD2L
5.5 9.0 mA
I
DD2H
7.0 9.0
Input Current I
I
–10 10 µA
Logic High Output V
OH
4.4 5.0 V I
O
= -20 µA, V
I
= V
IH
1, 2
Voltage 4.0 4.8 I
O
= -4 mA, V
I
= V
IH
Logic Low Output V
OL
0 0.1 V I
O
= 20 µA, V
I
= V
IL
Voltage 0.1 V I
O
= 400 µA, V
I
= V
IL
0.5 1.0 I
O
= 4 mA, V
I
= V
IL
Switching Specications
Propagation Delay Time t
PHL
20 40 ns C
L
= 15 pF 3, 6 3
to Logic Low Output CMOS Signal Levels
Propagation Delay Time t
PLH
23 40
to Logic High Output
Pulse Width PW 40
Data Rate 25 MBd
Pulse Width Distortion PWD 7721/0721 3 6 ns 7 4
|t
PHL
- t
PLH
| 7720/0720 3 8 ns
Propagation Delay Skew t
PSK
20 5
Output Rise Time t
R
9 ns
(10 - 90%)
Output Fall Time t
F
8 ns
(90 - 10%)
Common Mode |CM
H
| 10 20 kV/µs V
I
= V
DD1
, V
O
> 6
Transient Immunity at 0.8 V
DD1
,
Logic High Output V
CM
= 1000 V
Common Mode |CM
L
| 10 20 V
I
= 0 V, V
O
> 0.8 V,
Transient Immunity at V
CM
= 1000 V
Logic Low Output
Input Dynamic Power C
PD1
60 pF 7
Dissipation
Capacitance
Output Dynamic Power C
PD2
10
Dissipation
Capacitance