Datasheet
15
Figure 17. Thermal derating curve, dependence of
safety limiting value with case temperature per IEC/
EN/DIN EN 60747-5-2
Figure 14. Isolation mode rejection ratio vs. frequency
Figure 15. DC output voltage vs. transistor current gain
Figure 16. Output buer stage for low imped-
ance loads
HCPL-4562 fig 16
I
C
Q4
= 2 mA
R
9
Q
3
R
10
R
11
Q
4
Q
5
R
12
V
OUT
V
CC
LOW
IMPEDANCE
LOAD
ADDITIONAL
BUFFER
STAGE
OUTPUT POWER – P
S
, INPUT CURRENT – I
S
0
0
T
S
– CASE TEMPERATURE – °C
175
HCPL-4562 fig 17b
1000
50
400
12525 75 100 150
600
800
200
100
300
500
700
900
P
S
(mW)
I
S
(mA)
HCNW4562
HCPL-4562 fig 14a
IMRR – ISOLATION MODE REJECTION RATIO – dB
0.01
0
f – FREQUENCY – KHz
10,0000.1
150
60
90
1.0
HCPL-4562
30
10
120
100 1000
T
A
= 25 °C
-20 dB/DECADE SLOPE
G
v
v
OUT
/
v
IM
IMRR = 20 LOG
10
HCPL-4562 fig 15a
V
O
– DC OUTPUT VOLTAGE – V
50
3.0
h
FE
– TRANSISTOR CURRENT GAIN
450150
5.5
100 250 350
6.0
4.0
3.5
5.0
400200 300
4.5
HCPL-4562
HCNW4562
HCNW4562