Datasheet

ManualsBrandsBROADCOM ManualsOptoelectronics & DisplaysIntelligent-Power-Module-Interface-Optocoupler DIP 8 Type (misc.) 1 MBd

Features

• Performance specied for bommon IPM applications

over industrial temperature range: -40°C to 100°C

• Fast maximum propagation delays

PHL

= 480 ns

PLH

= 550 ns

• Minimized Pulse Width Distortion

PWD = 450 ns

• 15 kV/µs minimum common mode transient immu-

nity

at V

= 1500 V

• CTR > 44% at I

= 10 mA

• Safety approval:

UL Recognized

-3750 V rms / 1 min. for HCPL-4506/0466/J456

-5000 V rms / 1 min. for HCPL-4506 Option 020

and HCNW4506

CSA Approved

IEC/EN/DIN EN 60747-5-2 Approved

-V

IORM

= 560 Vpeak for HCPL-0466 Option 060

-V

IORM

= 630 Vpeak for HCPL-4506 Option 060

-V

IORM

= 891 Vpeak for HCPL-J456

-V

IORM

= 1414 Vpeak for HCNW4506

Applications

• IPM isolation

• Isolated IGBT/MOSFET gate drive

• AC and brushless DC motor drives

• Industrial inverters

CAUTION: It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and/or degradation which may be induced by ESD.

HCPL-4506 Functional Diagram

SHIELD

20 kΩ

ANODE

CATHODE

GND

HCPL-4506/J456/0466, HCNW4506

Intelligent Power Module and Gate Drive Interface Optocouplers

Data Sheet

Description

The HCPL-4506 and HCPL-0466 contain a GaAsP LED while

the HCPL-J456 and the HCNW4506 contain an AlGaAs LED.

The LED is optically coupled to an integrated high gain

photo detector. Minimized propagation delay dierence

between devices makes these optocouplers excellent so-

lutions for improving inverter eciency through reduced

switching dead time.

An on chip 20 kΩ output pull-up resistor can be enabled by

shorting output pins 6 and 7, thus eliminating the need for

an external pull-up resistor in common IPM applications.

Specications and performance plots are given for typical

IPM applications.

Functional Diagram

The connection of a 0.1 µF bypass capacitor

between pins 5 and 8 is recommended.

Truth Table

LED V

ON L

OFF H

Lead (Pb) Free

RoHS 6 fully

compliant

RoHS 6 fully compliant options available;

-xxxE denotes a lead-free product

Summary of content (21 pages)

PAGE 1
HCPL-4506/J456/0466, HCNW4506 Intelligent Power Module and Gate Drive Interface Optocouplers Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxE denotes a lead-free product Description Features The HCPL-4506 and HCPL-0466 contain a GaAsP LED while the HCPL-J456 and the HCNW4506 contain an AlGaAs LED. The LED is optically coupled to an integrated high gain photo detector.
PAGE 2
Selection Guide Package Type Standard 8-Pin DIP (300 Mil) White Mold 8-Pin DIP (300 Mil) Small Outline SO8 Widebody (400 Mil) Part HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506 Number IEC/EN/DIN EN 607475-2 Approval VIORM = 630 Vpeak VIORM = 891 Vpeak (Option 060) *Technical data for these products are on separate Avago publications.
PAGE 3
Ordering Information HCPL-0466, HCPL-4506 and HCPL-J456 are UL Recognized with 3750 Vrms for 1 minute per UL1577. HCNW4506 is UL Recognized with 5000 Vrms for 1 minute per UL1577. HCPL-0466, HCPL-4506, HCPL-J456 and HCNW4506 are approved under CSA Component Acceptance Notice #5, File CA 88324.
PAGE 4
Package Outline Drawings HCPL-4506 Outline Drawing 7.62 ± 0.25 (0.300 ± 0.010) 9.65 ± 0.25 (0.380 ± 0.010) 8 TYPE NUMBER 7 6 5 6.35 ± 0.25 (0.250 ± 0.010) OPTION CODE* DATE CODE A XXXXZ YYWW RU 1 2 3 4 UL RECOGNITION 1.78 (0.070) MAX. 1.19 (0.047) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 5° TYP. 3.56 ± 0.13 (0.140 ± 0.005) 4.70 (0.185) MAX. 0.51 (0.020) MIN. 2.92 (0.115) MIN. 1.080 ± 0.320 (0.043 ± 0.013) DIMENSIONS IN MILLIMETERS AND (INCHES).
PAGE 5
Package Outline Drawings HCPL-J456 Outline Drawing 7.62 ± 0.25 (0.300 ± 0.010) 9.80 ± 0.25 (0.386 ± 0.010) 8 TYPE NUMBER 7 6 5 6.35 ± 0.25 (0.250 ± 0.010) OPTION CODE* DATE CODE A XXXXZ YYWW RU 1 2 3 4 UL RECOGNITION 1.78 (0.070) MAX. 1.19 (0.047) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 5° TYP. 3.56 ± 0.13 (0.140 ± 0.005) 4.70 (0.185) MAX. 0.51 (0.020) MIN. 2.92 (0.115) MIN. 1.080 ± 0.320 (0.043 ± 0.013) DIMENSIONS IN MILLIMETERS AND (INCHES).
PAGE 6
HCPL-0466 Outline Drawing (8-Pin Small Outline Package) LAND PATTERN RECOMMENDATION 8 7 6 5 5.994 ± 0.203 (0.236 ± 0.008) XXX YWW 3.937 ± 0.127 (0.155 ± 0.005) 7.49 (0.295) TYPE NUMBER (LAST 3 DIGITS) DATE CODE PIN ONE 1 2 3 1.9 (0.075) 4 0.406 ± 0.076 (0.016 ± 0.003) 0.64 (0.025) 1.270 BSC (0.050) * 5.080 ± 0.127 (0.200 ± 0.005) 7° 3.175 ± 0.127 (0.125 ± 0.005) 45° X 0.432 (0.017) 0 ~ 7° 1.524 (0.060) 0.228 ± 0.025 (0.009 ± 0.001) 0.203 ± 0.102 (0.008 ± 0.
PAGE 7
HCNW4506 Gull Wing Surface Mount Option 300 Outline Drawing 11.15 ± 0.15 (0.442 ± 0.006) 8 7 6 LAND PATTERN RECOMMENDATION 5 9.00 ± 0.15 (0.354 ± 0.006) 1 2 3 13.56 (0.534) 4 1.3 (0.051) 2.29 (0.09) 12.30 ± 0.30 (0.484 ± 0.012) 1.55 (0.061) MAX. 11.00 MAX. (0.433) 4.00 MAX. (0.158) 1.78 ± 0.15 (0.070 ± 0.006) 2.54 (0.100) BSC 0.75 ± 0.25 (0.030 ± 0.010) 1.00 ± 0.15 (0.039 ± 0.006) DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
PAGE 8
Solder Reflow Temperature Profile 300 PREHEATING RATE 3 °C + 1 °C/–0.5 °C/SEC. REFLOW HEATING RATE 2.5 °C ± 0.5 °C/SEC. 200 PEAK TEMP. 245 °C PEAK TEMP. 240 °C TEMPERATURE (°C) 2.5 C ± 0.5 °C/SEC. 30 SEC. 160 °C 150 °C 140 °C PEAK TEMP. 230 °C SOLDERING TIME 200 °C 30 SEC. 3 °C + 1 °C/–0.5 °C 100 PREHEATING TIME 150 °C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE ROOM TEMPERATURE 0 0 50 100 150 TIME (SECONDS) NOTE: NON-HALIDE FLUX SHOULD BE USED.
PAGE 9
Regulatory Information The devices contained in this data sheet have been approved by the following agencies: Agency/Standard Underwriters Laboratories (UL) HCPL-4506 HCPL-J456 HCPL-0466 HCNW4506 • • • • • • • • • • • UL 1577 Recognized under UL 1577, Component Recognized Program, Category FPQU2, File E55361 Canadian Standards Association (CSA) Component Acceptance Notice #5 File CA88324 Verband Deutscher Electrotechniker (VDE) DIN VDE 0884 (June 1992) IEC/EN/DIN EN 60747-5-2 Appr
PAGE 10
All Avago data sheets report the creepage and clearance inherent to the optocoupler component itself. These dimensions are needed as a starting point for the equipment designer when determining the circuit insulation requirements. However, once mounted on a printed circuit board, minimum creepage and clearance requirements must be met as specified for individual equipment standards.
PAGE 11
Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature TS -55 125 °C Operating Temperature TA -40 100 °C Average Input Current[1] IF(avg) 25 mA Peak Input Current[2] (50% duty cycle, ≤1 ms pulse width) IF(peak) 50 mA Peak Transient Input Current (<1 µs pulse width, 300 pps) IF(tran) 1.
PAGE 12
Electrical Specifications Over recommended operating conditions unless otherwise specified: TA = -40°C to +100°C, VCC = +4.5 V to 30 V, IF(on) = 10 mA to 20 mA, VF(off ) = -5 V to 0.8 V† Parameter Symbol Device Min. Typ.* Max. Units Test Conditions Fig. Current Transfer Ratio CTR 44 90 % IF = 10 mA, VO = 0.6 V Low Level Output Current IOL 4.4 9.0 mA IF = 10 mA, 1, 2 VO = 0.6 V Low Level Output Voltage VOL 0.3 0.6 V HCPL-4506 1.5 5 mA VO = 0.
PAGE 13
Switching Specifications (RL= 20 kΩ External) Over recommended operating conditions unless otherwise specified: TA = -40°C to +100°C, VCC = +4.5 V to 30 V, IF(on) = 10 mA to 20 mA, VF(off ) = -5 V to 0.8 V† Parameter Symbol Min. Typ.* Max. Units Test Conditions Propagation Delay TPHL 30 200 400 ns CL = 100 pF Time to Logic HCPL-J456 480 Low at Output 100 CL = 10 pF IF(on) = 10 mA, VF(off ) = 0.8 V, VCC = 15.0 V, Fig.
PAGE 14
Package Characteristics Over recommended temperature (TA = -40°C to 100°C) unless otherwise specified. Parameter Sym. Input-Output Momentary VISO Withstand Voltage† Device Min. Typ.* Max. Units Test Conditions Fig. Note HCPL-4506 3750 V rms HCPL-0466 RH < 50% t = 1 min.
PAGE 15
NORMALIZED OUTPUT CURRENT IO – OUTPUT CURRENT – mA 8 6 4 VO = 0.6 V 2 0 100 °C 25 °C -40 °C 0 5 10 15 1.00 0.95 0.90 IF = 10 mA VO = 0.6 V 0.85 0.80 -40 20 -20 20 0 40 60 80 100 TA – TEMPERATURE – °C IF – FORWARD LED CURRENT – mA IOH – HIGH LEVEL OUTPUT CURRENT – µA 1.05 10 20.0 VF = 0.8 V VCC = VO = 4.5 V OR 30 V 15.0 4.5 V 30 V 10.0 5.0 0 -40 -20 0 20 40 60 80 TA – TEMPERATURE – °C Figure 2. Normalized output current vs. temperature. Figure 1.
PAGE 16
1 IF VCM 8 0.1 µF 20 kΩ 2 δV = VCM δt ∆t 20 kΩ 7 + – A B 3 6 OV VCC = 15 V ∆t VOUT 100 pF* 4 + VFF VO 5 SHIELD *100 pF TOTAL CAPACITANCE – VCC SWITCH AT A: IF = 0 mA VO VOL SWITCH AT B: IF = 10 mA – + VCM = 1500 V Figure 7. CMR test circuit. Typical CMR waveform.
PAGE 17
PS (mW) IS (mA) FOR HCPL-4506 OPTION 060 IS (mA) FOR HCPL-J456 700 600 500 400 300 (230) 200 100 0 0 25 50 75 100 125 150 175 200 OUTPUT POWER – PS, INPUT CURRENT – IS OUTPUT POWER – PS, INPUT CURRENT – IS HCPL-4506 OPTION 060/HCPL-J456 800 HCPL-0466 OPTION 060/HCNW4506 1000 PS (mW) FOR HCNW4506 IS (mA) FOR HCNW4506 PS (mW) FOR HCPL-0466 OPTION 060 IS (mA) FOR HCPL-0466 OPTION 060 900 800 700 600 500 400 300 200 (150) 100 0 0 25 50 75 100 125 150 175 TS – CASE TEMPERATURE – °C TS – CASE
PAGE 18
1 1 ITOTAL* 310 Ω 8 ICLEDP 2 3 IF 20 kΩ CLED02 CLEDP 7 CLEDN 4 + VR** – 100 pF 5 SHIELD CLED02 * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dVCM/dt TRANSIENTS. 3 CLEDN 4 6 5 * THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW FOR +dVCM/dt TRANSIENTS. ** OPTIONAL CLAMPING DIODE FOR IMPROVED CMH PERFORMANCE. VR < VF (OFF) DURING +dVCM/dt. + – – VCM VCM Figure 19. AC equivalent circuit for Figure 18 during common mode transients.
PAGE 19
HCPL-4506 1 I +5 V LED1 310 Ω 8 20 kΩ 2 VCC1 0.1 µF 3 6 4 5 IPM 20 kΩ 7 +HV VOUT1 CMOS Q1 SHIELD Q2 HCPL-4506 1 I +5 V LED2 310 Ω M 8 20 kΩ 2 VCC2 0.1 µF 3 6 4 5 -HV HCPL-4506 20 kΩ 7 HCPL-4506 VOUT2 CMOS HCPL-4506 HCPL-4506 HCPL-4506 SHIELD Figure 24. Typical application circuit. HCPL-4506 fig 28 ILED1 VOUT1 VOUT2 ILED1 VOUT1 VOUT2 ILED2 Q1 ON Q2 OFF Q2 ON tPLH MIN. Q2 ON PDD* MAX. tPLH MAX. tPHL MIN. tPHL MAX. MAX. DEAD TIME tPLH MAX. tPHL MIN. PDD* MAX.
PAGE 20
LED Drive Circuit Considerations for Ultra High CMR Performance Without a detector shield, the dominant cause of optocoupler CMR failure is capacitive coupl-ing from the input side of the optocoupler, through the package, to the detector IC as shown in Figure 16. The HCPL-4506 series improve CMR performance by using a detector IC with an optically transparent Faraday shield, which diverts the capacitively coupled current away from the sensitive IC circuitry.
PAGE 21
IPM Dead Time and Propagation Delay Specifications The HCPL-4506 series include a Propagation Delay Difference specification intended to help designers minimize “dead time” in their power inverter designs. Dead time is the time period during which both the high and low side power transistors (Q1 and Q2 in Figure 24) are off. Any overlap in Q1 and Q2 conduction will result in large currents flowing through the power devices between the high and low voltage motor rails.