Datasheet

10
Figure 10. Test circuit for t
EHL
and t
ELH
.
Figure 11. Typical enable propagation delay
vs. temperature.
Figure 7. Typical propagation delay vs.
temperature.
Figure 8. Typical propagation delay vs. pulse
input current.
Figure 9. Typical pulse width distortion vs.
temperature.
Figure 6. Test circuit for t
PHL
and t
PLH
.
OUTPUT V
MONITORING
NODE
O
+5 V
7
5
6
8
2
3
4
1
PULSE GEN.
Z = 50 Ω
t = t = 5 ns
O
f
I
I
L
R
R
M
CC
V
0.1µF
BYPASS
*C
L
*C
L
IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
GND
INPUT
MONITORING
NODE
r
1.5 V
t
PHL
t
PLH
I
I
INPUT
O
V
OUTPUT
I = 7.50 mA
I
I = 3.75 mA
I
V
CC
= 5 V
I
I
= 7.5 mA
100
80
-60 -20 20
60
100
T
A
– TEMPERATURE – °C
60
80400-40
0
t
P
– PROPAGATION DELAY – ns
40
20
t
PLH
, R
L
= 4 KΩ
t
PLH
, R
L
= 1 KΩ
t
PLH
, R
L
= 350 Ω
t
PHL
, R
L
= 350 Ω
1 KΩ
4 KΩ
V
CC
= 5 V
T
A
= 25°C
105
90
5913
I
I
– PULSE INPUT CURRENT – mA
75
15117
30
t
P
– PROPAGATION DELAY – ns
60
45
t
PLH
, R
L
= 4 KΩ
t
PLH
, R
L
= 1 KΩ
t
PLH
, R
L
= 350 Ω
t
PHL
, R
L
= 350 Ω
1 KΩ
4 KΩ
V
CC
= 5 V
I
I
= 7.5 mA
40
30
-20 20
60
100
T
A
– TEMPERATURE – °C
20
80400-40
PWD – PULSE WIDTH DISTORTION – ns
10
R
L
= 350 kΩ
R
L
= 1 kΩ
R
L
= 4 kΩ
0
-60
-10
OUTPUT V
MONITORING
NODE
O
1.5 V
t
EHL
t
ELH
V
E
INPUT
O
V
OUTPUT
3.0 V
1.5 V
+5 V
7
5
6
8
2
3
4
1
PULSE GEN.
Z = 50 Ω
t = t = 5 ns
O
f
I
I
L
R
CC
V
0.1 µF
BYPASS
*C
L
*C
L
IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
GND
r
7.5 mA
INPUT V
E
MONITORING NODE
t
E
– ENABLE PROPAGATION DELAY – ns
-60
0
T
A
– TEMPERATURE – °C
100
90
120
-20
30
20 60-40 0 40 80
60
V
CC
= 5 V
V
EH
= 3 V
V
EL
= 0 V
I
I
= 7.5 mA
t
ELH
, R
L
= 4 kΩ
t
ELH
, R
L
= 1 kΩ
t
EHL
, R
L
= 350 Ω, 1 kΩ, 4 kΩ
t
ELH
, R
L
= 350 Ω