Datasheet

ManualsBrandsBROADCOM ManualsOptoelectronics & DisplaysApplication-specific Optocoupler DIP 8 Type (misc.) Insulated line receiver

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to

prevent damage and/or degradation which may be induced by ESD.

Description

The HCPL-2602/12 are optically coupled line receivers

that combine a GaAsP light emitting diode, an input

current regulator and an integrated high gain photo

detector. The input regulator serves as a line

termination for line receiver applications. It clamps

the line voltage and regulates the LED current so line

reflections do not interfere with circuit performance.

The regulator allows a typical LED current of 8.5 mA

before it starts to shunt excess current. The output

of the detector IC is an open collector Schottky clamped

transistor. An enable input gates the detector. The

internal detector shield provides a guaranteed

common mode transient immunity specification of

1000 V/ms for the 2602, and 3500 V/ms for the 2612.

DC specifications are defined similar to TTL logic.

The optocoupler ac and dc operational parameters

are guaranteed from 0°C to 70°C allowing trouble-

free interfacing with digital logic circuits. An input

current of 5 mA will sink an eight gate fan-out (TTL)

at the output.

HCPL-2602, HCPL-2612

High CMR Line Receiver Optocouplers

Data Sheet

Features

• 1000 V/µs minimum Common Mode Rejection (CMR) at

= 50 V for HCPL-2602 and 3.5 kV/µs minimum

CMR at V

= 300 V for HCPL-2612

• Line termination included – no extra circuitry required

• Accepts a broad range of drive conditions

• LED protection minimizes LED efficiency degradation

• High speed: 10 MBd (limited by transmission line in

many applications)

• Guaranteed AC and DC performance over temperature:

0°C to 70°C

• External base lead allows “LED peaking” and LED

current adjustment

• Safety approval

UL recognized – 3750 V rms for 1 Minute

CSA approved

• MIL-PRF-38534 hermetic version available (HCPL-1930/1)

Applications

• Isolated line receiver

• Computer-peripheral interface

• Microprocessor system interface

• Digital isolation for A/D, D/A conversion

• Current sensing

• Instrument input/output isolation

• Ground loop elimination

• Pulse transformer replacement

• Power transistor isolation in motor drives

Functional Diagram

A 0.1 µF bypass capacitor must be connected between pins 5 and 8.

IN–

IN+

GND

CATHODE

LED

OFF

ENABLE

OUTPUT

TRUTH TABLE

(POSITIVE LOGIC)

SHIELD

Summary of content (16 pages)

PAGE 1
HCPL-2602, HCPL-2612 High CMR Line Receiver Optocouplers Data Sheet Description The HCPL-2602/12 are optically coupled line receivers that combine a GaAsP light emitting diode, an input current regulator and an integrated high gain photo detector. The input regulator serves as a line termination for line receiver applications. It clamps the line voltage and regulates the LED current so line reflections do not interfere with circuit performance. The regulator allows a typical LED current of 8.
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The HCPL-2602/12 are useful as line receivers in high noise environments that conventional line receivers cannot tolerate. The higher LED threshold voltage provides improved immunity to differential noise and the internally shielded detector provides orders of magnitude improvement in common mode rejection with little or no sacrifice in speed.
PAGE 3
Ordering Information HCPL-2602/HCPL-2612 is UL Recognized with 3750 Vrms for 1 minute per UL1577. Option Part RoHS non RoHS Number Compliant Compliant HCPL-2602 -000E no option HCPL-2612 -300E #300 -500E #500 Package 300 mil DIP-8 Surface Mount Gull Wing Tape & Reel X X X X X Quantity 50 per tube 50 per tube 1000 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry.
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Package Outline Drawings 8-Pin DIP Package 7.62 ± 0.25 (0.300 ± 0.010) 9.65 ± 0.25 (0.380 ± 0.010) 8 7 6 5 6.35 ± 0.25 (0.250 ± 0.010) TYPE NUMBER DATE CODE A XXXXZ YYWW RU 1 2 3 4 UL RECOGNITION 1.78 (0.070) MAX. 1.19 (0.047) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002) 5° TYP. 3.56 ± 0.13 (0.140 ± 0.005) 4.70 (0.185) MAX. 0.51 (0.020) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). 2.92 (0.115) MIN. NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX. 0.65 (0.025) MAX. 1.
PAGE 5
Regulatory Information The HCPL-2602/2612 have been approved by the following organizations: Solder Reflow Thermal Profile 300 TEMPERATURE (°C) PREHEATING RATE 3°C + 1°C/–0.5°C/SEC. REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC. PEAK TEMP. 245°C PEAK TEMP. 240°C PEAK TEMP. 230°C 200 2.5°C ± 0.5°C/SEC. SOLDERING TIME 200°C 30 SEC. 160°C 150°C 140°C UL Recognized under UL 1577, Component Recognition Program, File E55361. 30 SEC. 3°C + 1°C/–0.5°C 100 PREHEATING TIME 150°C, 90 + 30 SEC. 50 SEC.
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Absolute Maximum Ratings (No Derating Required up to 85°C) Parameter Symbol Storage Temperature TS Operating Temperature TA Forward Input Current II Reverse Input Current IIR Input Current, Pin 4 Supply Voltage (1 Minute Maximum) VCC Enable Input Voltage (Not to Exceed VCC by VE more than 500 mV) Output Collector Current IO Output Collector Voltage (Selection for Higher VO Output Voltages up to 20 V is Available.) Output Collector Power Dissipation PO Lead Solder Temperature TLS Min.
PAGE 7
Electrical Characteristics Over recommended temperature (TA = 0°C to +70°C) unless otherwise specified. See note 1. Parameter Sym. Min. Typ.* Max. Units Fig. High Level Output Current IOH 5.5 100 µA VCC = 5.5 V, VO = 5.5 V, II = 250 µA, VE = 2.0 V 1 Low Level Output Voltage VOL 0.35 0.6 V VCC = 5.5 V, II = 5 mA, VE = 2.0 V, IOL (Sinking) = 13 mA 2, 4, 5, 14 High Level Supply Current ICCH 7.5 10 mA VCC = 5.5 V, II = 0 mA, VE = 0.
PAGE 8
Switching Specifications Over recommended temperature (TA = 0°C to +70°C), VCC = 5 V, II = 7.5 mA, unless otherwise specified. Parameter Symbol Propagation Delay Time to High Output Level tPLH Propagation Delay Time to Low Output Level tPHL Pulse Width Distortion Device Min. Typ.* 20 48 25 |tPHL-tPLH| Max. Units 75 ns 100 ns 75 ns 100 ns 35 ns 40 ns Test Conditions Note 6, 7, 8 3 6, 7, 8 4 9 13 TA = 25°C TA = 25°C 50 3.5 Fig.
PAGE 9
VCC = 5.5 V VO = 5.5 V VE = 2 V II = 250 µA 10 5 0 -60 -40 -20 0 20 40 60 80 100 IO = 12.8 mA 0.3 VCC = 5 V TA = 25 °C RL = 350 Ω 3 RL = 1 KΩ 2 RL = 4 KΩ 1 0 1 2 3 4 5 6 IF – FORWARD INPUT CURRENT – mA Figure 4. Typical output voltage vs. forward input current. 9 IO = 6.4 mA 0.2 IO = 9.6 mA 0.1 -60 -40 -20 0°C 2.2 25°C 70°C 2.0 1.8 1.6 1.4 1.0 0 20 40 60 80 100 70 VCC = 5 V VE = 2 V VOL = 0.6 V 60 II = 10-15 mA 50 II = 5.0 mA 40 20 -60 -40 -20 2.4 1.2 Figure 2.
PAGE 10
+5 V INPUT MONITORING NODE 1 VCC 8 2 7 3 6 0.1µF BYPASS RL *CL RM 4 GND 100 OUTPUT VO MONITORING NODE tP – PROPAGATION DELAY – ns II PULSE GEN. Z O = 50 Ω t f = t r = 5 ns 5 *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. I I = 7.50 mA INPUT II I I = 3.
PAGE 11
tr, tf – RISE, FALL TIME – ns VCC = 5 V II = 7.5 mA tRISE tFALL II 1 VCC 8 2 7 3 6 B A RL = 4 kΩ 300 290 60 +5 V 0.1 µF BYPASS 350 Ω OUTPUT VO MONITORING NODE RL = 1 kΩ 4 40 0 -60 -40 -20 5 VCM RL = 350 Ω 20 GND + – PULSE GENERATOR Z O = 50 Ω RL = 350 Ω, 1 kΩ, 4 kΩ 0 20 40 60 80 100 TA – TEMPERATURE – °C VCM (PEAK) VCM Figure 12. Typical rise and fall time vs. temperature. VO VO 0V 5V SWITCH AT A: II = 0 mA CMH VO (MIN.) SWITCH AT B: II = 7.5 mA VO (MAX.) 0.
PAGE 12
Using the HCPL-2602/12 Line Receiver Optocouplers The primary objectives to fulfill when connecting an optocoupler to a transmission line are to provide a minimum, but not excessive, LED current and to properly terminate the line. The internal regulator in the HCPL2602/12 simplifies this task. Excess current from variable drive conditions such as line length variations, line driver differences, and power supply fluctuations are shunted by the regulator.
PAGE 13
Figure a. Polarity non-reversing. Figure b. Polarity reversing, single ended. <1 <1 Figure c. Polarity reversing, split phase. Figure d. Flip-flop configurations.
PAGE 14
different circuit configuration could make tPHL < tPLH, in which case NOR gates would be preferred. If it is not known whether tPHL > tPLH or tPHL < tPLH, or if the drive conditions may vary over the boundary for these conditions, the exclusive-OR flip-flop of Figure (d) should be used. RS-422 and RS-423 Line drivers designed for RS-422 and RS-423 generally provide adequate voltage and current for operating the HCPL-2602/12.
PAGE 15
DATA II INPUTS 50% CLOCK 1.5 V VO II DATA 50% OUTPUTS VO 1.5 V t PSK Figure 16. Illustration of propagation delay skew - tPSK. 15 t PSK CLOCK t PSK Figure 17. Parallel data transmission example.
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