Datasheet

8
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics
HCPL-3120
Description Symbol Option 060 HCPL-J312 HCNW3120 Unit
Installation classication per DIN VDE 0110/1.89, 
Table 1 
for rated mains voltage ≤150 V rms  I-IV  I-IV  I-IV 
for rated mains voltage ≤300 V rms  I-IV  I-IV  I-IV 
for rated mains voltage ≤450 V rms  I-III  I-III  I-IV 
for rated mains voltage ≤600 V rms  I-III  I-IV 
for rated mains voltage ≤1000 V rms  I-III
Climatic Classication  55/100/21  55/100/21  55/100/21
Pollution Degree (DIN VDE 0110/1.89)  2  2  2
Maximum Working Insulation Voltage  V
IORM
630  891  1414  V
peak
Input to Output Test Voltage, Method b*  V
PR
1181  1670  2652  V
peak
V
IORM
 x 1.875 = V
PR
, 100% Production Test, 
t
m
 = 1 sec, Partial Discharge < 5pC 
Input to Output Test Voltage, Method a*  V
PR
945  1336  2121  V
peak
V
IORM
 x 1.5 = V
PR
, Type and Sample Test, 
t
m
 = 60 sec, Partial Discharge < 5pC
Highest Allowable Overvoltage*  V
IOTM
6000  6000  8000  V
peak
(Transient Overvoltage, t
ini
 = 10 sec) 
Safety Limiting Values – maximum values allowed 
in the event of a failure, also see Figure 37. 
    Case Temperature  T
S
175  175  150  °C 
    Input Current  I
S INPUT
230  400  400  mA 
    Output Power  P
S OUTPUT
600  600  700  mW
Insulation Resistance at T
S
, V
IO
 = 500 V  R
S
≥10
9
≥10
9
≥10
9
Ω
*Refer to the IEC/EN/DIN EN 60747-5-2 section (page 1-6/8) of the Isolation Control Component Designers Catalog for a detailed description of 
Method a/b partial discharge test proles.
Note: These optocouplers are suitable for safe electrical isolation” only within the safety limit data. Maintenance of the safety data shall be en-
sured by means of protective circuits. Surface mount classication is Class A in accordance with CECC 00802.
All Avago data sheets report the creepage and clearance 
inherent  to  the  optocoupler  component  itself.  These 
dimensions  are  needed  as  a  starting  point  for  the 
equipment designer when determining the circuit insula-
tion requirements. However, once mounted on a printed 
circuit board, minimum creep-age and clearance require-
ments must be met as specied for individual equipment 
standards. For creepage, the shortest distance path along 
the surface of a printed circuit board between the solder 
llets of the input and output leads must be considered. 
There  are  recommended  techniques  such  as  grooves 
and ribs which may be used on a printed circuit board 
to  achieve  desired  creepage  and  clearances.  Creepage 
and clearance distances will also change depending on 
factors such as pollution degree and insulation level.