Datasheet

8
I
2
C Protocols
Each Send and Write protocol is, essentially, a series of
bytes. A byte sent to the APDS-9300 with the most sig-
nicant bit (MSB) equal to 1 will be interpreted as a COM-
MAND byte. The lower four bits of the COMMAND byte
form the register select address (see Table 2), which is
used to select the destination for the subsequent byte(s)
received. The APDS-9300 responds to any Receive Byte re-
quests with the contents of the register specied by the
stored register select address.
The APDS-9300 implements the following protocols of
the Philips Semiconductor I
2
C specication:
• I
2
C Write Protocol
• I
2
C Read Protocol
For a complete description of I
2
C protocols, please review
the I
2
C Specication athttp://www.semiconductors.phil-
ips.com
Figure 6. I
2
C Packet Protocol Element Key
Figure 7. I
2
C Write Protocols
Figure 8. I
2
C Read (Combined Format) Protocols
Wr
71 81 1 1 1
Data ByteSlave AddressS A PA
X X
A Acknowledge (this bit position may be 0 for an ACK or 1 for a NACK)
P Stop Condition
Rd Read (bit value of 1)
S Start Condition
Sr Repeated Start Condition
Wr Write (bit value of 0)
X Shown under a field indicates that that field is required to have a value of X
... Continuation of protocol
Master –to–Slave
Slave –to–Master
P
Wr
81 81 1 1 17
Slave AddressS A
A
Command Code Data Byte A
1
P
Wr
1
71 81 1 1 81 17 1 1
Data Byte
Slave AddressS A
A
Command Code Slave Address
A
ASr Rd
1
Figure 9. I
2
C Write Word Protocols
Figure 10. I
2
C Read Word Protocols
P
Wr
1
81 81 1 1 8 17 1
Data Byte High
Slave Address
S
A
A
Command Code
Data Byte Low
A
A
Wr
71 81 1 1 17 1 1
Slave Address
S
A
A
Command Code
Slave Address
A
Sr
Rd
8 1
Data Byte Low
A
…
P
1
8 1
Data Byte High
A
1