Datasheet

14
Figure 23. Recommended high-CMR drive circuit for the ACPL-P346/W346.
V
CC
V
EE
1
2
3
6
5
4
CATHODE
ANODE
V
OUT
I
LP
I
LN
C
LA
C
LC
+5 V
R
1
R
2
V
DD
= 5.0 V:
R
1
= 232 Ω± 1%
R
2
= 154 Ω ± 1%
R
1
/R
2
≈ 1.5
µC
Selecting the Gate Resistor (Rg)
Step 1: Calculate Rg minimum from the I
OL
peak specica-
tion. The MOSFET and Rg in Figure 22 can be analyzed as
a simple RC circuit with a voltage supplied by ACPL-P346/
W346.
LED Drive Circuit Considerations for High CMR Perfor-
mance
Figure 23 shows the recommended drive circuit for the
ACPL-P346/W346 that gives optimum common-mode
rejection. The two current setting resistors balance the
common mode impedances at the LED’s anode and cath-
ode. Common-mode transients can be capacitive coupled
from the LED anode, through C
LA
(or cathode through
C
LC
) to the output-side ground causing current to be
shunted away from the LED (which is not wanted when
the LED should be on) or conversely cause current to be
injected into the LED (which is not wanted when the LED
should be o).
Table 8 shows the directions of I
LP
and I
LN
depend on the
polarity of the common-mode transient. For transients
occurring when the LED is on, common-mode rejection
(CM
H
, since the output is at "high" state) depends on LED
current (I
F
). For conditions where IF is close to the switch-
ing threshold (I
FLH
), CM
H
also depends on the extent to
which I
LP
and I
LN
balance each other. In other words, any
condition where a common-mode transient causes a mo-
mentary decrease in I
F
(i.e. when dV
CM
/dt > 0 and |I
LP
| >
|I
LN
|, referring to Table 8) will cause a common-mode fail-
ure for transients which are fast enough.
Likewise for a common-mode transient that occurs when
the LED is o (i.e. CM
L
, since the output is at "low" state),
if an imbalance between I
LP
and I
LN
results in a transient
IF equal to or greater than the switching threshold of the
optocoupler, the transient “signal” may cause the output
to spike above 1 V, which constitutes a CM
L
failure. The
balanced I
LED
-setting resistors help equalize the com-
mon mode voltage change at the anode and cathode. The
shunt drive input circuit will also help to achieve high CM
L
performance by shunting the LED in the o state.
The external gate resistor, Rg and internal minimum turn-
on resistance, R
DSON
will ensure the output current will
not exceed the device absolute maximum rating of 2.5 A.
Step 1: Check the ACPL-P346/W346 power dissipation and
increase Rg if necessary. The ACPL-P346/W346 total pow-
er dissipation (P
T
) is equal to the sum of the emitter power
(P
E
) and the output power (P
O
).
P
T
= P
E
+ P
O
P
E
= I
F
• V
F
• Duty Cycle
P
O
= P
O(BIAS)
+ P
O(SWITCHING)
= I
CC
• (V
CC
-V
EE
) + P
HS
+ P
LS
P
HS
= (V
CC
*Q
G
*f) * R
DS,OH(MAX)
/ (R
DS,OH(MAX)
+Rg) / 2
P
LS
= (V
CC
*Q
G
*f) * R
DS,OL(MAX)
/ (R
DS,OL(MAX)
+Rg) / 2
Using I
F
(worst case) = 11 mA, Rg = 3.7 Ω,
Max Duty Cycle = 80%, Q
G
= 100 nC (650V 20A MOSFET),
f = 200 kHz and T
A max
= 85 °C:
P
E
= 11mA • 1.95V • 0.8 = 17mW
P
HS
= (10V • 100nC • 200 kHz) • 3.5Ω/(3.5Ω+3.7Ω)/2
= 48.6mW
P
LS
= (10V • 100nC • 200 kHz) • 2.0Ω/(2.0Ω+3.7Ω)/2
= 35.1mW
P
O
= 4mA • 10V + 48.6mW + 35.1mW
= 123.7mW < 500 mW (P
O(MAX)
@ 85 °C)
The value of 4 mA for I
CC
in the previous equation is the
maximum I
CC
over the entire operating temperature
range.
Since P
O
is less than P
O(MAX)
, Rg = 3.7 Ω is alright for the
power dissipation.
Ω=
Ω−
−
=
−
−
≥
7.3
3.0
5.2
010
)(
A
V
R
I
VV
Rg
MINDSON
OLPEAK
EECC