Datasheet

10
Figure 6. Test circuit for t
PHL
and t
PLH
.
OUTPUT V
O
MONITORING
NODE
3.3 V
PULSE GEN.
Z = 50 Ω
t = t = 5 ns
O
f
I
F
R
L
R
M
0.1 µF
BYPASS
*C
L
INPUT
MONITORING
NODE
r
*C
L
IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
1.5 V
t
PHL
t
PLH
I
F
INPUT
V
O
OUTPUT
I
F
= 7.50 mA
I
F
= 3.75 mA
4
5
6
V
CC
GND
3
1
OUTPUT V
O
MONITORING
NODE
1.5 V
t
PLH
t
PHL
I
F
INPUT
V
O
OUTPUT
I
F
= 7.5 mA
I
F
= 3.75 mA
+5 V
I
F
R
L
R
M
0.1µF
BYPASS
*C
L
*C
L
IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
INPUT
MONITORING
NODE
PULSE GEN.
Z
O
= 50 Ω
t
f
= t
r
= 5 ns
V
CC
GND
1
3
6
5
4
Figure 7. Typical propagation delay vs. temperature.
V
CC
= 5.0 V
I
F
= 7.5 mA
100
80
-60 -20 20
60
100
T
A
- TEMPERATURE - ° C
60
80400-40
0
t
P
- PROPAGATION DELAY - ns
40
20
t
PLH
, R
L
= 350
Ω
t
PHL
, R
L
= 350 Ω
V
CC
= 3.3 V
I
F
= 7.5 mA
150
120
-60 -20 20
60
100
T
A
– TEMPERATURE – C
90
80400-40
0
t
P
– PROPAGATION DELAY – ns
60
30
t
PHL
, R
L
= 350 Ω
t
PLH
, R
L
= 350 Ω