Datasheet

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Data subject to change. Copyright © 2008 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0458EN
AV02-0565EN - February 1, 2008
V
O
PULSE
GEN.
Z
O
= 50
t
r
= 5 ns
I
F
MONITOR
I
F
0.1µF
R
L
C
L
= 15 pF
100
0
t
PHL
t
PLH
V
O
I
F
V
OL
1.5 V 1.5 V
5 V
+5 V
1
3
6
5
4
10% DUTY CYCLE
1/f 100 µs
V
O
I
F
0.1µF
R
L
A
B
PULSE GEN.
V
CM
+
V
FF
V
O
V
OL
V
O
0 V
10%
90% 90%
10%
SWITCH AT A: I = 0 mA
F
SWITCH AT B: I = 1.6 mA
F
V
CM
t
r
t
f
5 V
V
CC
-
10 V
t
r
, t
f
= 16 ns
1
3
6
5
4
Figure 8. Switching Test Circuit
Figure 9. Test Circuit for Transient Immunity and Typical Waveforms.
0.01
0.1
1
10
100
1000
-60 -20 20 60 100 140
T
A
- TEMPERATURE -
o
C
I
OH
- LOGIC HIGH OUTPUT CURRENT - nA
I
F
= 0mA
V
O
= V
CC
= 5.0V
Figure 7. Logic High Output Current vs Temperature.