Datasheet

15
Applications Information
Eliminating Negative IGBT Gate Drive (Discussion applies to
ACPL-3130, ACPL-J313, and ACNW3130)
To keep the IGBT rmly o, the ACPL-3130 has a very
low maximum VOL specication of 0.5 V. The ACPL-3130
realizes this very low V
OL
by using a DMOS transistor
with 1 W (typical) on resistance in its pull down circuit.
When the ACPL-3130 is in the low state, the IGBT gate is
shorted to the emitter by R
g
+ 1 W. Minimizing R
g
and
the lead inductance from the ACPL-3130 to the IGBT gate
and emitter (possibly by mounting the ACPL-3130 on a
small PC board directly above the IGBT) can eliminate the
need for negative IGBT gate drive in many applications as
shown in Figure 29. Care should be taken with such a PC
board design to avoid routing the IGBT collector or emitter
traces close to the ACPL-3130 input as this can result in
unwanted coupling of transient signals into the ACPL-
3130 and degrade performance. (If the IGBT drain must
be routed near the ACPL-3130 input, then the LED should
be reverse-biased when in the o state, to prevent the
transient signals coupled from the IGBT drain from turning
on the ACPL-3130.)
Figure 29. Recommended LED Drive and Application Circuit.
Selecting the Gate Resistor (R
g
) to Minimize IGBT Switching
Losses. (Discussion applies to ACPL-3130, ACPL-J313 and
ACNW3130)
Step 1: Calculate Rg minimum from the I
OL
peak specication. The
IGBT and R
g
in Figure 30 can be analyzed as a simple RC circuit
with a voltage supplied by the ACPL-3130.
The V
OL
value of 2 V in the previous equation is a
conservative value of V
OL
at the peak current of 2.5A (see
Figure 6). At lower R
g
values the voltage supplied by the
ACPL-3130 is not an ideal voltage step. This results in
lower peak currents (more margin) than predicted by this
analysis. When negative gate drive is not used V
EE
in the
previous equation is equal to zero volts.
Figure 30. ACPL-3130 Typical Application Circuit with Negative IGBT Gate Drive.
+ HVDC
3-PHASE
AC
- HVDC
0.1 µF
V
CC
= 18 V
1
3
+
-
2
4
8
6
7
5
270 �
+5 V
CONTROL
INPUT
Rg
Q1
Q2
74XXX
OPEN
COLLECTOR
+ HVDC
3-PHASE
AC
- HVDC
0.1 µF
V
CC
= 15 V
1
3
+
-
2
4
8
6
7
5
Rg
Q1
Q2
V
EE
= -5 V
-
+
270 Ω
+5 V
CONTROL
INPUT
74XXX
OPEN
COLLECTOR
==
−+
=
−−
≥
8Ω7.2Ω
2.5
2515
I
VVV
R
OLPEAK
OLEECC
g
∼