Technical information

Opto IN24 OPTO DIO Reference
Figure 6-9. Watchdog Output Select.________________________________
FACTORY SET___________
RESLO BUS Approx 1 microsec LOW pulse on timeout
RESHI BUS Approx 1 microsec HIGH pulse on timeout
BUS Jumpers.
The top two jumpers, are the BUS jumpers, determine
which pulse is gated onto the PC expansion BUS slots interrupt
and reset lines. To actually drive the PC’s irq and reset lines the
lines must be gated on, under program control, by setting bit 0
for the Reset and bit 1 for the Irq line in the watchdog register.
Opto IN24 Memory Map.______________________
The Opto OUT24 has 24 dedicated input lines arranged as
3 eight bit read only registers and one read/write watchdog
enable/strobe register. Thus the Opto IN24 card occupies 4
consecutive i/o addresses, the base address plus 3 other
addresses. See Figure 6-10
The exact I/O base address is set by the DIP switches on
the card, see above. Inputting data from the Port A, B and C
registers senses the values of the pins at the external connector.
Writes to the watchdog register gate the Port C bit 0 and Bit 3
input signals and the signal selected by the BUS jumper to be
gated onto IRQ line or RESET line of the PC. Reading the
watchdog register refreshes the timer and postpones timeout for
another 50milliseconds.
Chapter 6 Page 73