Specifications

BMA180
Preliminary data sheet
Bosch Sensortec
Rev. 1.0 Page 59 / - proprietary information - 06 March 2009
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Specifications within this document are preliminary and subject to change without notice. Document is not intended for publication.
8.3 I²C interface
8.3.1 I²C timings
The I
2
C slave interface is compliant with Philips I
2
C Specification version 2.1 (January 2000). All
modes (standard, fast, high speed) are supported. SDI and SCK pins are not pure open-drain
(they are diodes to V
DDIO
).
t
HDDAT
t
f
t
BUF
SDI
SCK
SDI
t
LOW
t
HDSTA
t
r
t
SUSTA
t
HIGH
t
SUDAT
t
SUSTO
Figure 11: I
2
C timing diagram
The BMA180 I
2
C slave address is coded on 7 bits. The first 6 bits are defined by the sensor
itself, they are fixed. The last bit (LSB) is fixed by the value on SDO used as a digital input. Thus
by default the I
2
C address is either 40h for SDO-connection to V
SS
or 41h for SDO-connection to
V
DDIO
.
The I
2
C bus uses the 2 wires SCK (Serial Clock) and SDI (Serial Data Input). CSB is connected
to internal pull-up and must not be connected to ground (GND). SDI is bi-directional with pull-
down open drain: it must be externally connected to V
DDIO
via a pull up resistor.
Table 1: I
2
C bus terminology
Term Description
Transmitter the IC which sends data to the bus
Receiver the IC which receives data from the bus
Master the IC which initiates a transfer, generates clock
signals and terminates the transfer
(microcontroller in final application or tester during
calibration procedure)
Slave the IC addressed by a master (BMA180)