Specifications

BMA180
Preliminary data sheet
Bosch Sensortec
Rev. 1.0 Page 54 / - proprietary information - 06 March 2009
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Specifications within this document are preliminary and subject to change without notice. Document is not intended for publication.
7.12 Status register
7.12.1 first_tap sensing
This status bit is set when a first tap sensing shock has been detected. This bit is reset when at
least one of the following conditions is true:
- tap sensing feature is disabled during the processing of tap sensing sequence.
- tapsens_dur period is passed.
- tap sensing interrupt occurs.
7.12.2 str
This is the self test result bit. It should be used together with st0 control bit: after st0 has been
set, self-test procedure starts, at the end of it, st0 is written to 0 and microcontroller should react
by reading str bit. If str = 1, then the self test passed successfully. It stays high until POR or soft-
reset.
7.12.3 Slope alert
Slope alert is a feature, which is described in a separate application note (under preparation).
7.12.4 low_th_int, high_th_int, slope_int_s, tapsens_int
These latched status bits are set when the corresponding criteria have been issued. When
several interrupt modes are enabled, these bits can be used by microprocessor to detect which
criteria generated the interrupt.
If interrupts are not latched, status bits *_int are the same as the corresponding bits *_s, which
are defined in 7.12.5.
Disabling of an interrupt (e. g. setting low_th_int to ‘0’) shall not reset active latched interrupt
status bit (e. g. low_th_int remains at ‘1’ until a reset is performed by setting reset_int to ‘1’).
Changing to interrupt mode to non-latched (setting lat_int to ‘0’) shall immediately rset all
latched interrupt status bits.
7.12.5 low_th_s, high_th_s, slope_s, tapsens_s, offset_st_s
These status bits are set when the corresponding criteria have been issued; they are
automatically reset by BMA180 when the criteria disappear or if the corresponding interrupt is a
latched one and user issues reset_int.
7.12.6 offset_st_s
This status bit is set either at the end of offset regulation’s sequence or at the end of each data
acquisation’s phase of the selftest; it is automatically reset by BMA180 after 1*Tupdate.
7.12.7 x_first_int, y_first_int, z_first_int
These latched status bits can be used by microprocessor to detect on which axis any interrupt
occurs first after either system reset or reset_int event.