Specifications

BMA180

Preliminary data sheet

Bosch Sensortec

Rev. 1.0 Page 32 / - proprietary information - 06 March 2009

as copying and passing on to third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.

Specifications within this document are preliminary and subject to change without notice. Document is not intended for publication.

• After a write of mode_config bits in EEPROM, a soft reset is mandatory.

7.8.4 readout_12bit

For the acceleration read-out code, this bit allows switching from 14 bit (default mode,

readout_12bit = ‘0’) to 12 bit (readout_12bit = ‘1’). In this case, the two last LSB are set by

default to ‘0’. This might be useful if all other devices in a system just use 12 bit.

7.8.5 smp_skip (sample skipping)

Intention of this bit is to minimize MCU load, especially in case of very low BW. This bit is only

useful if new_data_int = 1.

- When smp_skip is set to ‘0’, interrupt is generated at 1/Tupdate.

- When smp_skip is set to ‘1’, interrupt is generated depending on bandwidth, it is twice the

selected bandwidth. For example, if bw = 0110b (600Hz), interrupt is generated at the half of

the frequency of the sampling rate, thus at 1200Hz. For bw = 10Hz, interrupt is generated at

20Hz. In low power mode, bw = 5Hz and interrupt is generated at 10Hz.

Additional advantage of using this bit in combination with new_data_int = 1 is noise

optimization. If customer is not using new_data_int and is collecting data with “small” data rate,

effect of MCU load minimization is similar, but noise might be higher, since data is not collected

synchronously to availability of new data (increase of noise due to interface traffic).

7.8.6 shadow_dis

BMA180 provides the possibility to block the update of the data MSB while data LSB are read

out. This avoids a potential mixing of LSB and MSB of successive conversion cycles. When this

bit is at 1, the shadowing procedure for MSB is not realized and MSB only reading is possible.

7.8.7 dis_reg

When this bit is at ‘1’, the internal regulators are disabled and are by-passed. This allows ultra

low voltage operation with highly stabilized external power supply. In this case PSRR of the

external power supply is determining the PSRR of the whole device.

Remark: if dis_reg = ‘1’, voltage must not exceed 2V (see specification part)

7.8.8 wake_up

This bit makes BMA180 automatically switching from sleep mode to normal mode after the

delay defined by wake_up_dur (see next section). The ASIC is also able to switch from normal

to sleep mode; an interrupt condition must be defined and the IC will go to sleep mode as soon

as all required computations have been performed.

When the IC goes from sleep to normal mode, it starts acceleration acquisition and performs the

interrupt verification. If a latched interrupt is generated, this will wake-up the microprocessor, the

IC will wait for a reset_int command. If non-latched interrupt is generated, the device waits in the

normal mode till the interrupt condition disappears. If no interrupt is generated, the IC goes to

sleep mode for 20 to 2560ms. BMA180 cannot go back to sleep mode if reset_int is not issued

after a latched interrupt.