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6000 Series Programmer's Guide

Fast Status, Servos

HEX Offset in

Fast Status Area

Description Size

Block 1

Commanded Position (counts), axis 1 – see TPC

Commanded Position (counts), axis 2

Commanded Position (counts), axis 3

Commanded Position (counts), axis 4

2 words

Block 2

Feedback Device Position (counts), axis 1 – see TFB

Feedback Device Position (counts), axis 2

Feedback Device Position (counts), axis 3

Feedback Device Position (counts), axis 4

2 words

Block 3

Commanded Velocity (counts/sec), axis 1 – see TVEL

Commanded Velocity (counts/sec), axis 2

Commanded Velocity (counts/sec), axis 3

Commanded Velocity (counts/sec), axis 4

2 words

Block 4

Axis Status Information, axis 1 – see TAS

Axis Status Information, axis 2

Axis Status Information, axis 3

Axis Status Information, axis 4

2 words

Block 5

Input Status for 28 inputs (bits 0-27) – see TIN

Output Status for 28 outputs (bits 0-27) – see TOUT

Limits – see side note

Limits Bit Assignments

on page 43

Other Input Status – see TINO

Analog Voltage, channel 4,3,2,1 – see TANV

2 words

1 word

2 words

Block 6

Interrupt Status – see TINT

System Status – see TSS

User Status – see TUS

Time Frame Mark *

Programmable Timer Value – see TIMST

2 words

1 word

2 words

Block 7

ANI input value, input 1 (ADC counts; 819 counts/volt) – see TPANI

ANI input value, input 2 (ADC counts)

ANI input value, input 3 (ADC counts)

ANI input value, input 4 (ADC counts)

Commanded DAC value, axis 1 (DAC counts; 2048 counts/10 volts) – TDAC

Commanded DAC value, axis 2 (DAC counts)

Commanded DAC value, axis 3 (DAC counts)

Commanded DAC value, axis 4 (DAC counts)

1 word

Block 8

Position error, axis 1 (counts) – see TPER

Position error, axis 2 (counts)

Position error, axis 3 (counts)

Position error, axis 4 (counts)

2 words

* Timer starts on computer powerup; rolls over; updated once per

system update

(see SSFR).

Reading The Fast

Status Register

Below is a step-by-step procedure for reading information from the fast status area.

Step 1

Request that the information contained within the fast status register be updated. This is

accomplished by writing the byte 48 Hex to the status register, located four address locations

above the base address.

Step 2

Wait for the information in the fast status area to be updated. This is accomplished by reading

the status register (bits 0 - 7) until bit 3 is set.

Step 3

Point to the information you wish to retrieve. This is accomplished by writing the hex offset

value (1 byte) shown in the table above to the fast status register (2 address locations above

the base address).

Step 4

Read the information from the fast status area, one word (two bytes) at a time.

As you read each word, (by writing to Base+2), the internal pointer will automatically

increment to the next word in the block until a block boundary is reached. A block boundary

occurs every 8 words, starting from the first word. Once a block boundary is reached, step 3

above must be repeated; otherwise, the pointer will wrap around to the beginning of the same

segment.

If two words are required to be read in order to obtain all the information, the first word read is

the most significant in terms of value.

Step 5

After the word(s) are read, each word must swap its most significant and least significant bytes.

These steps are illustrated by the source code examples below.