Service manual

Reference Information
2-10 Samsung Electronics
2-1-7 VIC50 (SAA7128 ; Digital Video Encoder)
I
2
C-
INTERFACE
SYNC/
CLOCK
MP
MP
9..16
44
20
21
I
2
C-Control
I
2
C-Control
I
2
C-Control
I
2
C-Control
I
2
C-Control
Clock&Timing
RESN
40
42
41
35
34
7
8
43
37
4
25,28,31,36
SDA
SCL
XTALI
XTAL
RCV1
RCV2
TTXRQ
XCLK
LLC1
VDDA
VDD I2C
SA
MP(7:0)
TTX
FADER
ENCODER
OUTPUT-
INTERFACE
D
A
RGB-
PROCESSOR
D
22,32,33
23
26
29
30
27
Y
C
Y
5,18,38
6,17,39
2
3
VSS
VDD
SP
AP
19
RTC1
CbCr
Y
CbCr
24
R(Cr)
VSSA
G(Y)
B(Cb)
CVBS
(CSYNC)
VBS
(CVBS)
C
(CVBS)
A
BLOCK DIAGRAM
NAME
res.
SP
AP
LLC1
V
SS1
VDD1
RCV1
RCV2
I/O
I
I
I
I
I
I/O
I/O
PIN
1
2
3
4
5
6
7
8
FUNCTION
Reserved pin, do not connect
Test Pin;connected to digital ground for normal operation
Test Pin;connected to digital ground for normal operation
Line-Locked Clock input;this is the 27 MHz master clock
Digital supply ground 1
Digital supply 1
Raster Contral 1 for video port. This pin receives/provides a VS/FS/FSEQ signal.
Raster Contral 2 for video port. This pin provides an HS pulse of programmable length or receives
an HS pulse.