User's Manual

Page 33
BitaTek Co., Ltd. Copyright protected. All rights reserved.
NO. 115 Wugong 3rd Rd., Tel [phone]
Wugu Dist., New Taipei City 248, Taiwan (R.O.C.) Fax[phone]
Table 3.5.4.2 SDC2,UIM
Parameter
Min.
Max.
Unit
Common to UIM pads at either voltage (VDD_PX= VREG_L14)
VIH
High-level input voltage
0.7 × VDD_PX
VDD_PX + 0.3
V
VIL
Low-level input voltage
0
0.2 × VDD_PX
V
VOH
High-level output voltage
0.8 × VDD_PX
VDD_PX
V
VOL
Low-level output voltage
0
0.4
V
SDC2 pads at 2.95 V only(VDD_PX= VREG_L12)
VIH
High-level input voltage
0.625 ×
VDD_PX
VDD_PX + 0.3
V
VIL
Low-level input voltage
0
0.25 × VDD_PX
V
VOH
High-level output voltage
0.75 × VDD_PX
VDD_PX
V
VOL
Low-level output voltage
0
0.125 × VDD_PX
V
SDC2 pads at 1.8 V only
VIH
High-level input voltage
1.27
2
V
VIL
Low-level input voltage
0
0.58
V
VOH
High-level output voltage
1.4
-
V
VOL
Low-level output voltage
0
0.45
V
Table 3.5.4.3 USB
Parameter
Min.
Typ.
Max.
Unit
Supply voltages
Dual-supply
-
-
1.80
3.075
-
-
V
USBPHY_SYSCLK
Frequency
-
19.2
-
MHz
Duty cycle
40
-
60
%
Low-level input voltage (VIL)
-
-
0.85
V
High-level input voltage (VIH)
1.27
-
-
V
USBPHY_VBUS
Valid USB_HS_VBUS detection
voltage
2.0
-
5.25
V