User`s manual

TG31-A7 BIOS Manual
33
Integrated Memory Test
Integrated Memory Test allows users to test memory module compatibilities without
additional device or software.
Step 1:
This item is disabled on default; change it to “ Enable” to precede memory test.
BIOS SETU P U TILITY
Main Advan ced PCIPnP Boot Chipset T-Series
vxx .xx (C)Copyright 1985-200x, American Me gatrends, Inc.
S elect Screen
S elect Item
G o to Sub Screen
G eneral Help
S ave and Exit
Exit
Enter
F1
F10
ESC
T-Series Setti ngs
WARNING: Setti ng wrong values in below sections
may c ause system to malf unction.
=========== Au tomate OverClock Sy stem ===========
============ M anual OverClock Sys tem ============
OverClock Navi gator [N ormal]
PCIE Clock By [A uto]
CPU Voltage [D efault]
FSB Voltage [D efault]
Chipset Voltag e [D efault]
Memory Voltage [D efault]
DRAM Frequency [A uto]
Configure DRAM Timing by SPD [E nabled]
Auto OverClock System [V 6-Tech Engine]
CPU Frequency Setting [2 00]
PCIE Frequency Setting [1 00]
Integrated Mem ory Test [E nabled]
Exit
Options
Disabled
Enabled
Step 2:
When the process is done, change the setting back from “Enabled” to “Disabled” to
complete the test.
BIOS SETU P U TILITY
Main Advan ced PCIPnP Boot Chipset T-Series
vxx .xx (C)Copyright 1985-200x, American Me gatrends, Inc.
S elect Screen
S elect Item
G o to Sub Screen
G eneral Help
S ave and Exit
Exit
Enter
F1
F10
ESC
T-Series Setti ngs
WARNING: Setti ng wrong values in below sections
may c ause system to malf unction.
=========== Au tomate OverClock Sy stem ===========
============ M anual OverClock Sys tem ============
OverClock Navi gator [N ormal]
PCIE Clock By [A uto]
CPU Voltage [D efault]
FSB Voltage [D efault]
Chipset Voltag e [D efault]
Memory Voltage [D efault]
DRAM Frequency [A uto]
Configure DRAM Timing by SPD [E nabled]
Auto OverClock System [V 6-Tech Engine]
CPU Frequency Setting [2 00]
PCIE Frequency Setting [1 00]
Integrated Mem ory Test [D isabled]
Exit
Options
Disabled
Enabled