User`s manual

TA785G3/TA780G3/TA760G3 BIOS Manual
38
tWTR
Options: Auto (Default)
tRFC0 / tRFC1 / tRFC2 / tRFC3
Options: Auto (Default)
Memory Configuration
BIOS S ETUP UTILITY
vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc.
S elect Screen
S elect Item
C hange Option
G eneral Help
S ave and Exit
E xit
+-
F1
F1 0
ES C
Memor y Configurati on
Bank Interleaving [ Auto]
Chann el Interleavi ng [ XOR of Addre ss bit]
Enabl e Clock to Al l DIMMs [ Disabled]
MemCl k Tristate C3 /ATLVID [ Disabled]
Memor y Hole Remapp ing [ Enabled]
DCT U nganged Mode [ Always]
Power Down Enable [ Disabled]
Pag e Smashing [ Disabled]
> ECC Configuratio n
Enab le Bank Memo ry
Inte rleaving
T-Series
Bank Interleaving
Bank Interleaving is an advanced chipset technique used to improve memory
performance. Memory interleaving increases bandwidth by allowing simultaneous
access to more than one piece of memory.
Options: Auto (Default) / Disabled
Channel Interleaving
This item allows you to control the DDR2 dual-channel function.
Options: XOR of Address bits [20:16, 6] (Default) / XOR of Address bits
[20:16, 9] / Address bits 6 / Address bits 12 / Disabled