Specifications

CM-X300 CoM
28 CM-X300 Reference Guide Rev 1.31 30-Dec-2010
 If there is stable keypad activity for a period greater than the specified key
debounce interval while the automatic-scan-on-activity is enabled, completion of the
scan generates an interrupt.
 If the automatic-scan is enabled, user software determines when to initiate an
automatic scan. This option does not generate an interrupt.
Table 21 Keypad Signals
CM-X300 Signal
Name
Type
Description
KP_MKOUT[5:0]
O
Matrix Key Column-Scan Outputs
The keypad controller sends column-scan output signals to the columns of
the matrix keypad to detect any key(s) that are pressed. If an automatic
scan is occurring, these column-scan output signals are driven by the
automatic scan logic. At other times, they are driven by the settings of bits
MS5 through MS0 in the CPU‘s Keypad Interface Control (KPC) register.
KP_MKIN[7:0]
I
Matrix Key Inputs (Returns)
The input signals from the matrix keypad (matrix-keypad row readings).
KP_DKIN[3:0]
(shared with
GPIO88…85)
I
Direct Key Inputs
Signals from the direct keys and the rotary-encoder sensor.
KP_DKIN<1:0> are either input signals for direct keys 1 and 0 or input
sensor signals for rotary encoder A (if enabled).
KP_DKIN<3:2> are either input signals for direct keys 3 and 2 or input-
sensor signals for rotary encoder B (if enabled).
Note: direct keys and rotary encoder inputs are shared with the Matrix Key Column-Scan
Outputs and other signals and may be made available through software.
3.3.8 LCD Interface
Features of the LCD controller are as follows:
 Display modes
 Single display modules
 Passive panels: 24-bit-per-pixel color displays (no monochrome support)
 Active panels: 8-, or 16 bit-per-pixel single-scan color displays without an
internal frame buffer
 Smart panels: Up to 24-bit-per-pixel single-scan color displays with an internal
frame buffer
 Display sizes (both portrait and landscape formats):
 176 x 208
 176 x 220
 240 x 240
 320 x 240 (QVGA)
 320 x 320
 640 x 480 (VGA)
 800 x 480
The following display sizes are supported, but may have restrictions with
overlays enabled, BPP setting, and pixel clock frequency:
 800 x 600
 1024 x 768
 1024 x 1024
 64-entry (by 24 bits) output FIFO
 Three 256-entry by 25-bit internal color-palette RAMs (one for each overlay and
base), programmable for automatic loading at the beginning of each frame
 Command data RAM (16 x 9 bits) to hold command data
 Pixel depths of 8, 16, 18 and 24 bpp RGB, and 19 and 25 bpp RGBT formats