User Manual

element14 is a trademark of Premier Farnell plc 36

6.1 Power Section

Figure 21

is the high level block diagram of the power section of the board.

Figure 21 High Level Power Block Diagram

This section describes the power section of the design and all the functions performed by the

TPS65217C

6.1.1 TPS65217C PMIC

The main Power Management IC (PMIC) in the system is the

TPS65217C

which is a

single chip power management IC consisting of a linear dual-input power path, three

step-down converters, and four LDOs. LDO stands for Low Drop Out. If you want to know

more about an LDO, you can go to http://en.wikipedia.org/wiki/Low- dropout_regulator. If

you want to learn more about step-down converters, you can go to

http://en.wikipedia.org/wiki/DC-to-DC_converter

The system is supplied by a USB port or DC adapter. Three high-efficiency 2.25MHz

step-down converters are targeted at providing the core voltage, MPU, and memory

voltage for the board.

The step-down converters enter a low power mode at light load for maximum efficiency

across the widest possible range of load currents. For low-noise applications the devices