Data Sheet

AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
SPRS717F OCTOBER 2011REVISED APRIL 2013
www.ti.com
Table 3-6. VDD_CORE Operating Performance Points for ZCZ Package
with Device Revision Code "A" or Newer
(1)
VDD_CORE VDD_CORE
OPP DDR3,
DDR2
(2)
mDDR
(2)
L3 and L4
Rev "A" or DDR3L
(2)
MIN NOM MAX
Newer
OPP100 1.056 V 1.100 V 1.144 V 400 MHz 266 MHz 200 MHz 200 MHz and
100 MHz
OPP50 0.912 V 0.950 V 0.988 V - 125 MHz 90 MHz 100 MHz and
50 MHz
(1) Frequencies in this table indicate maximum performance for a given OPP condition.
(2) This parameter represents the maximum memory clock frequency. Since data is transferred on both edges of the clock, double-data rate
(DDR), the maximum data rate is two times the maximum memory clock frequency defined in this table.
Table 3-7. VDD_MPU Operating Performance Points for ZCZ Package
with Device Revision Code "A" or Newer
(1)
VDD_MPU
VDD_MPU OPP
ARM (A8)
Rev "A" or Newer
MIN NOM MAX
Nitro 1.272 V 1.325 V 1.378 V 1 GHz
Turbo 1.210 V 1.260 V 1.326 V 800 MHz
OPP120 1.152 V 1.200 V 1.248 V 720 MHz
OPP100
(2)
1.056 V 1.100 V 1.144 V 600 MHz
OPP100
(3)
1.056 V 1.100 V 1.144 V 300 MHz
OPP50 0.912 V 0.950 V 0.988 V 300 MHz
(1) Frequencies in this table indicate maximum performance for a given OPP condition.
(2) Applies to all orderable AM335__ZCZ_60 (600 MHz speed grade) or higher devices.
(3) Applies to all orderable AM335__ZCZ_30 (300 MHz speed grade) devices.
Table 3-8. Valid Combinations of VDD_CORE and
VDD_MPU Operating Performance Points for ZCZ
Package with Device Revision Code "A" or Newer
VDD_CORE VDD_MPU
OPP50 OPP50
OPP50 OPP100
OPP100 OPP50
OPP100 OPP100
OPP100 OPP120
OPP100 Turbo
OPP100 Nitro
84 Device Operating Conditions Copyright © 2011–2013, Texas Instruments Incorporated
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