User`s manual

36
This item allows you to adjust the AGP driving force. Choose Manual to key in an AGP Driving
Value in the next selection. This field is recommended to set in Auto to avoid any error in your
system.
AGP Driving Value
This item allows you to adjust the AGP driving force. The choices are: Min=00 to Max=FF.
AGP Master 1 WS Write
When enabled, writes to the AGP is executed with one wait state. Available options Enabled or
Disabled.
AGP Master 1 WS read
When enabled, reads to the AGP is executed with on wait state. Available options Enabled or
Disabled.
3-6-3 CPU & PCI Bus Control Settings
Phoenix – AwardBIOS CMOS Setup Utility
AGP & P2P Bridge Control
Item Help
CPU to PCI Write Buffer [Enabled]
PCI Master 0 WS Write [Enabled]
PCI Delay Transaction [Disabled]
Menu Level >>
↑↓→←
Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Optimized Defaults F7:Standard Defaults
CPU to PCI Write Buffer
When this field is enabled, write from the CPU to the PCI bus is buffered, to compensate for the
speed differences between CPU and the PCI bus. When disabled, the writes are not buffered and
the CPU must wait until the write is complete before starting another write cycle.
PCI Delay Transaction
This chipset has an embedded 32-bit posted write buffer to support delay transaction cycles. Select
Enabled to support compliance with PCI specification version 2.1. Available choices are: Enabled
or Disabled.