User`s manual

29
3-6 Advanced Chipset Features
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Item Help
DRAM Timing Selectable [By SPD]
X CAS Latency Time 4
X DRAM RAS# to CAS# Delay 4
X DRAM RAS# Precharge 4
X Precharge delay (tRAS) 11
System BIOS Cacheable [Enabled]
Video BIOS Cacheable [Disabled]
** VGA Setting **
On-Chip Frame Buffer Size [32MB]
DVMT Mode [DVMT]
DVMT Fixed Memory Size [128MB]
Menu Level >
↑↓→←
Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
DRAM Timing Selectable:
Select the DRAM timing for SPD or Manual
CAS Latency Time:
This Option allow to select the DRAM CAS latency depend on the module specs.
Available choice: 2 or 2.5.
DRAM RAS# To CAS# Delay:
This field allow you to insert a timing delay between the CAS and RAS strobe.
Avalable choice: 2 or 3.
DRAM RAS# Precharge: