User`s manual

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4. BIOS Setup
Menu Item Setting Descriptions
Bank 0/1 DRAM
Timing
SDRAM 8/10ns
Bank 2/3 DRAM
Timing
SDRAM 8/10ns
Bank 4/5 DRAM
Timing
SDRAM 8/10ns
It allows you to select the value in the field,
depending on whether the board has paged
DRAMs or EDO (extended data output)
DRAMs.
SDRAM Cycle
Length
3, 2 3 is for slower SDRAM DIMM module.
2 is for faster SDRAM DIMM module.
DRAM Clock Host Clock,
HCLK-33M
Allows you to control the DRAM speed.
Disabled Closes this function. Memory Hole
Enabled In order to improve performance, certain space
in memory is reserved for ISA cards. This
memory must be mapped into the memory
space below 16MB.
Enabled PCI Master
Pipeline Req
Disabled
Enabled Enables the PCI to CPU, CPU to PCI
concurrency.
P2C/C2P
Concurrency
Disabled Closes this function.
Enabled Enables the fast read, write turn around. Fast R-W Turn
Around
Disabled Closes this function.
Disabled Closes this function. System BIOS
Cacheable
Enabled Allows for the caching of the system BIOS
ROM at F0000h-FFFFFh, resulting in better
system performance.
Disabled Closes this function. Video RAM
Cacheable
Enabled Allows for the caching of the video RAM,
resulting in better system performance.
AGP Aperture
Size
64MB, 32MB Means the AGP Graphics Aperture Size is
64MB or 32MB.
Enabled Enable this function. AGP 4X Mode
Disabled Closes this function.
Auto AGP Driving
Control
Manual