User guide

US 8,549,062 B2
3
These and many other objects and advantages of the
present invention Will no doubt become obvious to those of
ordinary skill in the art after having read the following
detailed description of the preferred embodiments Which are
illustrated in the various draWing ?gures.
IN THE DRAWINGS
FIG. 1 is a functional block diagram of a netWork remote
poWer management outlet strip embodiment of the present
invention;
FIG. 2A is a front diagram of an implementation of the
netWork remote poWer management outlet strip of FIG. 1;
FIG. 2B is an assembly diagram of the netWork remote
poWer management outlet strip of FIG. 2A Without the sheet
metal enclosure, and shoWs the interWiring amongst the AC
receptacles, the poWer input plug, and the various printed
circuit board modules;
FIG. 3 is a non-component side diagram of a printed circuit
board (PCB) implementation of an intelligent poWer module
IPT-IPM, similar to those of FIGS. 1, 2A, and 2B, and further
illustrates an insulating sheet that is ?tted to the back;
FIG. 4 is a component-side diagram of a printed circuit
board (PCB) implementation of an intelligent poWer module
IPT-IPM, similar to those of FIGS. 1, 2A, 2B, and 3, and
further illustrates the bus connections of the poWer outlet
receptacles it sockets onto;
FIG. 5 is a functional block diagram of an IPT-NetWorkPM
module embodiment of the present invention;
FIG. 6 is a schematic diagram of a circuit that couldbe used
in an implementation of the IPT-PS of FIGS. 1, 2A, and 2B;
FIG. 7 is a functional block diagram of a netWork remote
poWer management system embodiment of the present inven
tion;
FIG. 8 is a functional block diagram of an expandable
poWer management system embodiment of the present inven
tion;
FIG. 9 is a functional block diagram of a poWer distribution
unit embodiment of the present invention; and
FIG. 10 is a schematic diagram of one Way to implement
the IPT-IPM’s in any of FIGS. 1-9.
DETAILED DESCRIPTION OF THE PREFERRED
EMBODIMENTS
FIG. 1 represents a netWork remote poWer management
outlet strip embodiment of the present invention, and is
referred to herein by the general reference numeral 100. The
outlet strip 100 provides independently managed poWer to
each of sixteenAC-output receptacles 101-116. A poWer sup
ply (IPT-PS) module 118 senses and totaliZes the combined
current delivered to all the AC-output receptacles 101-116
from its AC-poWer input.
Peripheral integrated circuits (IC’s) that have to commu
nicate With each other and the outside World can use a simple
bi-directional 2-Wire, serial data (SDA) and serial clock
(SCL) bus for inter-IC (I2C) control developed by Philips
Semiconductor. The I2C-bus has become a WorldWide indus
try-standard proprietary control bus.
The IPT-PS module 118 digitally encodes the total AC
current information onto an internal I2C-bus 119. The IPT-PS
module 118 supplies DC-operating poWer for the internal
I2C-bus 119 Which is derived from the AC-poWer input. Each
of four intelligent poWer modules (IPT-IPM) 120-123 have
four relays (Kl-K4) that sWitch AC-poWer from the IPT-PS
module 118 to respective ones of the sixteen AC-output
receptacles 101-116. Such relays K1-K4 are controlled by a
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single I2C transceiver daisy-chain connected to others along
the internal I2C-bus 119. Each such I2C transceiver is inde
pendently addressable on the I2C-bus 119, and provides a
digitally encoded poWer-on status indication for all four
relays K1-K4.
An I2C-module (IPT-I2C) 124 receives digital messages
on the internal I2C-bus 119 and decodes and displays the
totaliZed combined current, e. g., in AC-amperes, on an LED
readout 126. A user is thus able to see the effect on the total
current caused by plugging or unplugging a load from any or
all of the AC-output receptacles 101-116.
The Philips 87LPC762 microcontroller is used as an I2C
interface to a dual seven-segment display. Port-0 pins select
the illuminated segments of a seven-segment display. Pin
Pl .7 selects Which of the tWo seven-segment displays is being
driven, and alternates betWeen the tWo seven-segment dis
plays fast enough to avoid ?icker. The I2C slave address is
con?gurable. Five commands are supported: STAT (status)
RBTN (Read button), RPRB (Read probe), CRST (Clear
reset), and WDSP (Write display). A checksum is used on
received/ sent bytes for data integrity across the I2C-bus.
The IPT-I2C microcontroller starts up With the I2C inter
face in idle slave mode. Main ( ) Waits in a loop until the I2C
interface is ?agged as non-idle. After an I2C start occurs, and
the rising edge of SCL sets DRDY (and thus ATN), an I2C
interrupt occurs. The I2C ISR disables the I2C interrupt and
sets a global I2C non-idle ?ag. The main loop then proceeds
to read in the ?rst byte from the I2C-bus. When seven bits are
received, the target I2C is knoWn and is compared to the
IPT-I2C microcontroller’s oWn module address. If different,
the I2C interface processing stops and Waits for another start
to begin again. If the same, the last bit of the ?rst byte is read,
Which is the R/W bit. If a Read, then the IPT-I2C microcon
troller acknoWledges the byte and repeatedly sends a ?xed
number of response bytes: an address byte, a type byte, one or
more data bytes, and a checksum. If a Write, then the IPT-I2C
microcontroller acknoWledges the byte, and then Will read up
to four more bytes: a command byte one or more data bytes,
and a checksum. As received, the bytes are acknoWledged and
compared to expected valid commands and data. As soon as a
valid command, any data parameters and a valid checksum
are received and acknoWledged, the command is acted upon.
Without a valid checksum, the command is not acted upon. If
an unexpected command or data is received, or more bytes are
received than expected, then a negative acknoWledge occurs
after the next byte is received, and the I2C interface is
stopped, and another start is needed to begin again. Through
out the I2C processing loop, a bus timeout (by Timer 1 inter
rupt) resets the I2C interface to idle and the I2C processing
loop to the appropriate states Timer U also guards the I2C
interface With a 5-millisecond inter-clock timeout and a 15
second total I2C timeout. The total I2C timeout is reset When
the IPT-I2C microcontroller is addressed on the I2C With its
primary address (not the secondary address).
The I2C IPT-I2C microcontroller commands include the
STAT command Which sets the IPT-I2C microcontroller to a
read type to STAT. This means that an I2C Read Will send four
bytes (address, type data checksum) in Which the data byte
represents the status of the IPT-I2C microcontroller.
The RBTN command sets the IPT-I2C microcontroller
read type to RBTN. This means that an I2C Read Will send
four bytes (address, type, data, checksum) in Which the data
byte represents the status of the button.
The RPRB command sets the IPT-I2C microcontroller
read type to RPRB. This means that an I2C Read Will send