Specifications

Standard features of the I²C bus include the ability to detect data collision

between multiple communicating devices, different modes of operation for

reading and writing at speeds ranging from 100 kbps to 3.4 mbps, and physically

defined bus addresses that can be software defined and allow for easy removal

and addition of devices to the bus during system operation.

The SDA line is a bi-directional serial data line that facilitates data transfer

between master and slave devices, synchronized by the SCL line driven by the

master device. These lines are either open-collector or open-drain, depending on

the type of transistor technology used by the device manufacturer. As seen in

Figure 3.2.1-2, the lines are in an unknown state when not being used, so they

must be set to a known state using a 5V voltage source with current-limiting pull-

up resistors. This sets the condition that both lines are held to a digital logic high

when not in use. The upper limit on the number of devices that can be connected

to a single bus is a function of the bus capacitance, defined by NXP to be no

more than 400pF. Because our system design only incorporates three devices

into the bus, there should be no immediate concern about reaching this upper

limit. With the addition of multiple devices, it would be necessary to calculate the

input capacitance of each device and verify that our design falls within the

standard.

Figure 3.2.1-2 The I²C Bus w/ multiple devices, reprinted with permission from

NXP Semiconductor

In the I²C bus topology, a “Master” is the device that provides the clock source on

the SCL line for the “Slave” devices. In Figure 3.2.1-3, the master device initiates

data communications with a “START” condition, consisting of a HIGH to LOW

transition of the SDA line while the SCL line is at a logical high. The master

device terminates with a “STOP” condition, which consists of a LOW to HIGH

transition of the SDA line while the SCL line is at a logical high. The slave device

can receive and transmit data to the master device, but cannot initiate such

conditions. It is also possible to have multiple master devices on the same I²C

bus, using a method of arbitration to prevent multiple masters from initiating