User's Manual

Product Brief – Airborne SDIO/SPI 802.11b/g Radio Quatech, Inc.
846-8310-240 June 2010 6
Table 3 - SDIO Interface Definition Table
SDIO
Pin
Module
Pin
SD 4-bit Pin Name
SD 4-bit Description
SD 1-bit Pin Name
SD 1-bit Description
1
11
DATA3
Data bit 3
N/C
Reserved
2
14
CMD
Command line.
CMD
Command line.
3
1, 2, 8,9,
29, 30
VSS1
Ground (GND)
VSS1
Ground
4
4, 6
VDD
Supply Voltage (VHIO)
VDD
Supply Voltage (VHIO)
5
12
CLK
Clock from host (up to 48MHz)
CLK
Clock from host (up to 48MHz)
6
1, 2, 8,9,
29, 30
VSS2
Ground (GND)
VSS2
Ground
7
13
DATA0
Data bit 0
DATA
Data line
8
10
DATA1
Data bit 1
IRQ
Interrupt
9
7
DATA2
Data bit 2
RW
Read/Write (optional)
Table 4 - SPI Interface Definition table
Module Pin
SPI Pin Name
SPI Description
7
DATA2
SPI Host Interrupt Request. Asserted by card to request an SPI data
transfer. Interrupt output.
10
DATA1
SPI Data Output (MISO).
12
CLK
Clock from host (up to TBD MHz)
13
DATA0
SPI Card Select from host. Active Low
14
CMD
SPI Data Input (MOSI).
18
SPI_RSTn
SPI Device RESET from host. Active Low (Section Error!
Reference source not found.)

1. It is recommended pins 27 and 28 be brought out to test pads or a pinned header.