User's Manual

Product Brief – Airborne SDIO/SPI 802.11b/g Radio Quatech, Inc.
846-8310-240 June 2010 22
11.0 Design Guidelines
The WLRG-RA-DP601 is designed for integration in to a wide range of advanced
electronic systems and diverse applications, the success of the integration and final
performance of the complete system depends upon the integration process and hardware
design, the following section provides a set of guidelines to aid in the integration of the
radio.
The following guidelines address hardware design requirements for the integration of the
radio under normal conditions, should your application not be able to support the listed
guidelines please contact Quatech.
11.1 VDD/VHIO Power Supply
The WLRG-RA-DP601 supports a split power supply; it requires both a VHIO and
VDD power supply to function correctly.
VHIO defines the power domain that supports the host interface and must be
powered to support the mating interface on the host. It will support both a
1.8VDC and 3.3VDC supply rail.
VDD is the main power supply for the radio and supplies all aspects of the radio
with the exception of the host interface. The VDD is a 3.3VDC supply, please
refer to Table 6 for the power supply requirements.
If the SDIO interface is being used the radio supports the power specification as
defined by the SDIO interface specification, no additional power supply support is
required.
It is acceptable to supply VHIO from the VDD power rail if the host supports a
3.3VDC interface. The full interface specification can be referenced in Table 7.
11.2 SDIO (pin #5)
This pin defines the host interface boot definition for the radio, defining either a
SDIO or SPI interface. This pin should be configured as shown in Table 15 for
the radio to boot successfully.
Table 15 - SDIO (Pin #5) Configuration Options
Figure 7 show the recommended network for the pin.
SDIO Mode
Description
SPI
Pin must be pulled to ground.
SDIO
Pin must be pulled to VDD.