User's Manual

Product Brief – Airborne SDIO/SPI 802.11b/g Radio Quatech, Inc.
846-8310-240 June 2010 17
8.0 GSPI Interface
The General Serial Peripheral Interface (GSPI) for the WLRG-RA-DP601 is detailed in
the following section. The interface is powered by the VHIO (pin 4 & 6) supply as defined
in Table 2.
8.1 SPI Protocol Timing
The following figures and table define the required timing for the GSPI interface.
Figure 2 - GSPI Timing Diagram
SPI Clock (CLK)
SPI Select (DATA0)
SPI Data Out (DATA1)
SPI Data In (CMD)
T
CSS
T
SCLK
T
CSH
T
WR
T
WF
T
WH
T
WL
T
SU
T
H
T
V
Hi-Z
VALID DATA IN
Figure 3 - GSPI Inter-Transaction Timing
SPI Select (DATA0)
T
CRF
lll lll